The ARM Assembler



       armasm [options] filename objfile
       armasm [options] -o objfile filename


       The  ARM  Assembler  compiles  ARM  Assembly Language into
       object code in ARM Object Format. This  is  then  suitable
       for  linking  by  the  ARM Linker, with (or without) other
       object code produced by either the ARM Assembler or ARM  C
       Compiler, or with object libraries.

       For more information about ARM Assembly Language see chap-
       ter "ARM Assembly Language", and  chapter  "Exploring  ARM
       Assembly  Language"  starting  on page 20 of the Cookbook.
       For more  information  about  different  formats  the  ARM
       Linker can produce see "The ARM Linker (armlink)" starting
       on page 19 of User Manual.

       In this section, and in other documentation  which  refers
       to  armasm,  the  first  and  second  pass  are mentioned.
       armasm processes its source  files  twice  to  reduce  the
       amount  of  internal  state  which needs to be kept - this
       effects the user in a few ways which are mentioned  below,
       and in chapter "ARM Assembly Language".


       Upper-case  is  used  to show the allowable abbreviations.
       Note that to understand what many of these options  do  it
       may  be  necessary  to  refer to some of the documentation
       listed above.

       -list listingfile
              Several options work with -list:

                     Turns the terse flag  off  (the  default  is
                     on).   When  the  terse  flag  is  on  lines
                     skipped due to conditional assembly  do  not
                     appear  in the listing.  With the terse flag
                     off these lines do appear in the listing.

              -WIdth n
                     Sets listing page width (the default is 79).

              -Length n
                     Sets  listing  page  length  (the default is
                     66). Setting the length to zero produces  an
                     unpaged listing.

              -Xref  Lists  cross-referencing information on sym-
                     Default is off.

       -Depend dependfile
              Saves source file dependency lists, which are suit-
              able for use with 'make' utilities..

       -I dir{,dir}
              Adds  directories to the source file search path so
              that arguments to GET/ INCLUDE  directives  do  not
              need  to  be fully qualified.  The search rule used
              is similar to the ANSI C search rule - the  current
              place being the directory in which the current file
              was found.

       -PreDefine directive
              Pre-executes a SETx directive. This implicitly exe-
              cutes a corresponding GBLx directive. The full SETx
              argument should be quoted as  it  contains  spaces,
              e.g. -PD "Version SETA 44".

              Turns  off  source  caching,  (the  default is on).
              Source caching is  performed  when  reading  source
              files  on  the first pass, so that they can be read
              from memory, rather than from disk during the  sec-
              ond pass of assembly.

       -MaxCache n
              Sets  the maximum source cache size. The default is

       -NOEsc Ignore C-style special characters (ie '0, ''  etc).

              Turns off warning messages.

       -g     Outputs ASD debugging tables, suitable for use with

       -Errors errorfile
              Output error messages to errorfile.

              Assemble code suitable for a little-endian ARM, (by
              setting  the  built-in  variable  {ENDIAN} to "lit-

              Assemble code suitable for a  big-endian  ARM,  (by
              setting the built-in variable {ENDIAN} to "big").

       -CPU ARMcore
              sor  specific instructions will produce warnings if
              assembled for the wrong ARM core.

       -Help  Displays a summary of the command-line options.

       -Apcs option{/qualifier}{/qualifier...}
              Specifies whether the ARM Procedure  Call  Standard
              is  in  use,  and also specifies some attributes of
              CODE AREAs.

              There are two APCS options: NONE and 3;  qualifiers
              should  only be used with 3.  By default the regis-
              ter names R0-15, r0-15, sp, SP, lr, LR, pc, PC  are
              pre-declared.  If  the APCS is in use the following
              register names are also pre-declared: a1-a4, v1-v6,
              sl, fp, ip, and sp. The qualifiers are as follows:

                          Sets  the  reentrant  attribute for any
                          code AREAs, and predeclares sb  (static
                          base) in place of v6.

                   /32bit Is  the default setting and informs the
                          Linker that the code being generated is
                          written  for  32-bit  ARMs.  The armasm
                          built-in varaible {CONFIG} is also  set
                          to 32.

                   /26bit Tells  the  Linker  that  the  code  is
                          intended for 26-bit ARMs.   The  armasm
                          built-in  varaible {CONFIG} is also set
                          to 26.  Note that these options do  not
                          of  themselves generate particular ARM-
                          specific code, but allow the Linker  to
                          warn  of  any  mismatch  between  files
                          being linked, and also  allow  programs
                          to  use  the standard built-in variable
                          {CONFIG} to determine what code to pro-

                          Marks  CODE  AREAs  as using sl for the
                          stack  limit  register,  following  the
                          APCS (the default setting).

                          Marks  CODE AREAs as not using software
                          stack-limit checking,  and  predeclares
                          an  additional  v-register, v6 if reen-
                          trant, v7 if not.


       Reference Manual, Technical Specifications