Not all RTL is officially synthesisable, as defined by language standards. However, commercial tools tend to support larger subsets than officially standardised.
RTL with event control in the body of a thread defines a state machine. This is compilable by some tools.
This state machine requires a program counter (PC) register at runtime (implied):
input clk, din; output reg [3:0] q; // Four bits of state are define here. always begin q <= 1; @(posedge clk) q <= 2; if (din) @(posedge clk) q <= 3; q <= 4; end
How much additional state in the form of PC bits are needed ? Is conditional event control synthesisable ? Does the output `q' ever take on the value 4 ?
22: (C) 2008-16, DJ Greaves, University of Cambridge, Computer Laboratory. | Flash Player Upgrade Needed ![]() ![]() | ![]() |