ACS SOC D/M P35: Ex 4 A/B 2015/16: Mini-Project and Structured Research Essay. The deadline for all P35 work is the first day of Easter Term. Notes: Please ensure you have completed earlier exercises and feel to free to reuse text or results from earlier exercises for the Mini-Project (4a). Collaborating is not allowed for the Research Essay and is only allowed for any parts of the mini-project that are borrowed from the term-time work or with express permission that will only be granted if the nature of the collaboration will enable individual contributions to be clearly discriminated. Your audience is the External Examiner, Second Assessor and readers of Design and Reuse or Electronics Times. It is therefore worthwhile explaining material that would perhaps be well known to others directly involved in this module. Please feel free to contact DJG as much as you like for assistance and advice with Exercise 4 A/B over the Easter Vac. --------------------------------------------------------------------- Exercise 4a (accounts for 30 credit points): Ex4 Part A: (Mini-Project): Construct an interesting argument based on practical work you have conducted on design tools for FPGA and System-on-Chip embedded software. This will most likely be based on the group mini-project last term, but you need to make perfectly clear what your own contribution to the work is. Write a report in a style suitable for publication in Electronics Times or Design and Reuse (or similar). You should aim to write at least 2000 words but full credit is available if information is instead conveyed in diagrams and figures. All of the words must be your own work but diagrams from any source may be included if credited properly. You argument itself does not have to be original: basing your report on an existing D&R or ET article is acceptable. Most importantly: think carefully about your report structure. Cite relevant prior work or alternative solutions. Perhaps use a provocative title that poses a question, then expand on the question in the introduction and answer it at the end. Other points you might consider are: In the case of IP-XACT, it is not clear how many SoC designs use it, but certainly not all. So there are alternative approaches including some commercial products. Chisel is a new hardware language and rather simple, although elegantly embedded in Scala which provides considerable metaprogramming power. What is its future? What should Chisel 3.0 aim to include? What percentage of industrial high-level modelling uses SystemC and what else is used? Is UML/SysML or GUI-based SoC design serious or toy ? What would be needed to take your practical work and to industry and for it to be adopted ? What is the complete bundle for IP block distribution: this clearly includes high-level models, actual implementations, data sheets and machine-readable meta-information for energy and area accounting, test-programme generation, software programming, automatic configuration ... Feel free to ask DJG for further pointers on specific topics. --------------------------------------------------------------------- Exercise 4b: Structured Research Essay Task: See companion sheet. --------------------------------------------------------------------- --------------------------------------------------------------------------- Further Notes arising this year (March/April 2016): Q. How about the length of 4a? The articles on design and reuse vary from very short to quite lengthy. A. I agree they vary a lot. For your masters degree you need to show that you have 'mastered' a particular subject, and this does not directly relate to some word count. Also I've tried not to be overly prescriptive with exactly what gets written up where, but being underly prescriptive is also unhelpful. And the word count will vary greatly according to how many diagrams used to tell the story. Overall about 5 pages for each of Ex 4a and Ex4b (total 10) should be sufficient. END