TLM POWER 3 library for SystemC: SRAM example

(Details not examinable.)

Setting the static power and area for an SRAM based on eariler 45nm formulae:

void sram64_cbg::recompute_pvt_parameters() // Called in constructor and when Vcc is changed.
{
  m_latency =  sc_time(0.21 + 3.8e-4 *sqrt(float(m_bits)), SC_NS);

  pw_power leakage = pw_power(82.0 * m_bits, PW_nW);
  set_static_power(leakage);

  set_fixed_area(pw_area(13359.0 + 4.93/8 * m_bits, PW_squm));

  m_read_energy_op = pw_energy(5.0 + 1.2e-4 / 8.0 *m_bits, pw_energy_unit::PW_pJ);
  m_write_energy_op = 2.0 * m_read_energy_op; // rule of thumb!

  // NB: Might want different energy when high-order address bits change.

  pw_voltage vcc = get_vcc();
  m_latency = m_latency / vcc.to_volts();
  cout << name () << ":" << kind() << ": final latency = " << m_latency << "\n";
}

void sram64_cbg::b_access(PW_TLM_PAYTYPE &trans, sc_time &delay)
{
  tlm::tlm_command cmd = trans.get_command();

  // Log wiring power consumed by transaction arriving here.
  // Also set which nets modelled by the TLM will be active after this operation:
  // For a write none (except a response ack) and for read the payload data.
  trans.pw_log_hop(this,  (cmd==tlm::TLM_READ_COMMAND ? PW_TGP_DATA: PW_TGP_NOFIELDS) |
          PW_TGP_ACCT_CKP,  &read_bus_tracker);

  if (cmd == tlm::TLM_READ_COMMAND)
    {
      // Log internal transaction energy for read
      pw_module_base::record_energy_use(m_read_energy_op); 
      ...
    }
  else if (cmd == tlm::TLM_WRITE_COMMAND)
    {
      // Log internal transaction energy for write
      pw_module_base::record_energy_use(m_write_energy_op);
      ...
    }

}