SoC Component, TLM 1.0 Form Example.

Example: a one-channel DMA controller:

// Bus slave side, operand registers uint32 src, dest, length; bool busy, int_enable; uint32 status() { return (busy << 31) | (int_enable << 30); } uint32 slave_read(int a) { return (a==0)? src: (a==4) ? dest: (a==8) ? (length) : status(); } void slave_write(int a, uint32 d) { if (a==0) src=d; else if (a==4) dest=d; else if (a==8) length = d; else if (a==12) { busy = d >> 31; int_enable = d >> 30; } }

// Bus mastering side while(1) { waituntil(busy); while (length-- > 0) mem.write(dest++, mem.read(src++)); busy = 0; }

Like to make interrupt output with an RTL-like continuous assignment:

   interrupt = int_enable & !busy;