It is useful to distinguish between network interfaces which are self-selecting and those which are not. Self-selecting interfaces use the VCI (or similar) in the header of arriving data to access the correct buffer control information. These are typically high bandwidth interfaces with DMA support. Non self-selecting interfaces require software copying of data (e.g. Ethernet).
Examples of self-selecting interfaces include the AURORA TURBOchannel interface [33] and the Jetstream / Afterburner combination [34]. In Jetstream the arriving packets enter a special buffer memory based on the arriving VCI. The device driver then reads the headers and instructs a special DMA engine to copy the data to the final location. Knowledgeable applications may make special use of the buffer pools in the special memory.
It has been recent practice in operating systems to support a protocol independent scheme for determining the process for which packets arriving at an interface are destined. This is known as packet filtering [6] and this technology is now highly advanced [7, 35]. For non-self-selecting interfaces, packet filtering can determine which I/O path the data will travel along as easily as it can determine which process will be the receiver. This property is assumed in the Nemesis buffer mechanism derived below.
On older hardware many devices which used DMA required a single non-interrupted access to a contiguous buffer. On more recent platforms such as the TURBOchannel [36] the bus architecture requires that a device burst for some maximum period before relinquishing the bus. This is to prevent the cache and write buffer being starved of memory bandwidth and halting the CPU. Devices are expected to have enough internal buffering to weather such gaps. Also, the high bandwidth that is available from DMA on typical workstations depends on accessing the DRAMs using page mode. Such accesses mean that the DMA cycle must be re-initiated on crossing a DRAM page boundary. Furthermore most workstations are designed for running UNIX with its non-contiguous Mbuf chains. The result of this is that most high performance DMA hardware is capable of (at least limited) scatter-gather capability.