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Output Formats
The HPR library contains a number of output code generators.
All of these write out a representation of an internal HPR machine.
Not all forms of HPR machine can be written out in all output forms,
but, where this is not possible, a synthesis engine should be
available that can be applied to the internal HPR machine to convert it.
Certaint output formats can encode both an RTL/hardware-style
and a software/threaded style. For instance, a C-like input
file can be rendered out again in threaded C style, or as a list
of non-blocking assignments using the SystemC library.
The following output formats may be created:
- RTL Form: The RTL output is written as a Verilog RTL.
One module is created that
either contains just the RTL portion of the design, or the RTL and
instances of each MPU that is executing software parts of the
design.
- Netlist Form: The RTL output is compiled to
a structural netlist in Verilog that contains
nothing but gate and flip-flop instances.
- H2 IMP Form: The HPR form is output
to an IMP file. This has the same syntax as the imperative subset of H2.
- SMV form: The HPR VM is output as an SMV code
and the assertions that have not been compiled or refined are output
as assertions for SMV to check.
- C Form: The HPR VM is output as C code
suitable for third-party compilers. RTL forms may also be output as synthesisable SystemC.
- UIA MPU Form: The IMP imperative language is compiled to IMP assembly
language and output as a .s file.
- IP XACT form: The structural components are written out as IP XACT
definitions and instances.
- S-expression form: The HPR VM is dumped a lisp S-expression to a file.
- UIA Machine Code: The IMP assembly is compiled to machine code
for the UIA microcontroller. This is output as Intel Hex and
also as a list of Verilog assignments for initialising a memory with this code.
The net-based output architecture is suitable for direct
implementation as a custom SoC (system on chip). H2 defines its own
microcontroller and we use the term MPU to denote an H2
microcontroller with an associated firmware ROM. The net-based
architecture consists of RTL logic and some number of MPUs. However,
by requesting that all output is as C code for a single MPU, the
net-based output degenerates to a single file of portable C code.
Additional output files include log files and synthesisable and
high-level models of the UISA microprocessor that executes IMP machine
machine code.
Next: Index
Up: SPL Orangepath H2 Language
Previous: Orangepath Synthesis Engines
Index
David Greaves
2009-08-20