// CBG Orangepath HPR L/S System

// Verilog output file generated at 12/02/2017 23:19:17
// Kiwi Scientific Acceleration (KiwiC .net/CIL/C# to Verilog/SystemC compiler): Version alpha 0.3.1 : 7th-Feb-2017 Unix 3.19.8.100
//  /home/djg11/d320/hprls/kiwipro/kiwic/distro/lib/kiwic.exe -print-limit=50 -kiwic-register-colours=1 -vnl-resets=asynchronous -vnl-roundtrip=disable -kiwic-kcode-dump=enable -bevelab-default-pause-mode=hard -bevelab-soft-pause-threshold=150 -kiwic-autodispose=enable -res2-loadstore-port-count=0 -repack-to-roms=enable -vnl-rootmodname DUT bittally.exe -vnl bittally.v
`timescale 1ns/1ns


module DUT(output reg done, input clk, input reset);
  parameter DATA_WIDTH = 8;
  parameter ADDR_WIDTH = 8;
  parameter WORDS = 256;
  parameter LANE_WIDTH = 8;
  reg [7:0] A_8_US_CC_SCALbx10_ARA0[255:0];
  integer bench_T404_Main_T404_Main_V_0;
  reg [3:0] xpc10nz;
  reg [7:0] A_8_US_CC_SCALbx10_ARA0_RDD0;
  reg [7:0] A_8_US_CC_SCALbx10_ARA0_AD0;
  reg A_8_US_CC_SCALbx10_ARA0_REN0;
  reg [7:0] Z8USCCSCALbx10ARA0RRh10hold;
  reg Z8USCCSCALbx10ARA0RRh10shot0;
  reg [7:0] Z8USCCSCALbx10ARA0RRh12hold;
  reg Z8USCCSCALbx10ARA0RRh12shot0;
  reg [7:0] Z8USCCSCALbx10ARA0RRh14hold;
  reg Z8USCCSCALbx10ARA0RRh14shot0;
  reg [7:0] Z8USCCSCALbx10ARA0RRh16hold;
  reg Z8USCCSCALbx10ARA0RRh16shot0;
 always   @(* )  begin 
       A_8_US_CC_SCALbx10_ARA0_AD0 = 32'sd0;
       A_8_US_CC_SCALbx10_ARA0_REN0 = 32'sd0;
       A_8_US_CC_SCALbx10_ARA0_REN0 = ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)? (4'sd6/*6:xpc10nz*/==xpc10nz) || (4'sd8
      /*8:xpc10nz*/==xpc10nz) || (4'sd9/*9:xpc10nz*/==xpc10nz) || (4'sd7/*7:xpc10nz*/==xpc10nz): (4'sd1/*1:xpc10nz*/==xpc10nz) || (4'sd3
      /*3:xpc10nz*/==xpc10nz) || (4'sd4/*4:xpc10nz*/==xpc10nz) || (4'sd2/*2:xpc10nz*/==xpc10nz));

      if ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)) 
          case (xpc10nz)
              4'sd6/*6:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&$signed(32'd51*bench_T404_Main_T404_Main_V_0));

              4'sd7/*7:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&($signed(32'd51*bench_T404_Main_T404_Main_V_0)>>4'sd8
              ));


              4'sd8/*8:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&($signed(32'd51*bench_T404_Main_T404_Main_V_0)>>32'sd16
              ));


              4'sd9/*9:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&($signed(32'd51*bench_T404_Main_T404_Main_V_0)>>32'sd24
              ));

          endcase
           else 
          case (xpc10nz)
              4'sd1/*1:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&$signed(32'd51*bench_T404_Main_T404_Main_V_0));

              4'sd2/*2:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&($signed(32'd51*bench_T404_Main_T404_Main_V_0)>>4'sd8
              ));


              4'sd3/*3:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&($signed(32'd51*bench_T404_Main_T404_Main_V_0)>>32'sd16
              ));


              4'sd4/*4:xpc10nz*/:  A_8_US_CC_SCALbx10_ARA0_AD0 = $unsigned(32'd255&($signed(32'd51*bench_T404_Main_T404_Main_V_0)>>32'sd24
              ));

          endcase
       end 
      

 always   @(posedge clk or posedge reset )  begin 
      //Start structure HPR @8_US/CC/SCALbx10_ARA0
      if (reset)  A_8_US_CC_SCALbx10_ARA0_RDD0 <= 32'd0;
           else  A_8_US_CC_SCALbx10_ARA0_RDD0 <= A_8_US_CC_SCALbx10_ARA0[A_8_US_CC_SCALbx10_ARA0_AD0];
      //End structure HPR @8_US/CC/SCALbx10_ARA0


      //Start structure HPR bittally
      if (reset)  begin 
               done <= 32'd0;
               bench_T404_Main_T404_Main_V_0 <= 32'd0;
               Z8USCCSCALbx10ARA0RRh16hold <= 32'd0;
               Z8USCCSCALbx10ARA0RRh14hold <= 32'd0;
               Z8USCCSCALbx10ARA0RRh12hold <= 32'd0;
               Z8USCCSCALbx10ARA0RRh10hold <= 32'd0;
               Z8USCCSCALbx10ARA0RRh10shot0 <= 32'd0;
               Z8USCCSCALbx10ARA0RRh12shot0 <= 32'd0;
               Z8USCCSCALbx10ARA0RRh14shot0 <= 32'd0;
               Z8USCCSCALbx10ARA0RRh16shot0 <= 32'd0;
               xpc10nz <= 32'd0;
               end 
               else  begin 
              if ((4'sd11/*11:xpc10nz*/==xpc10nz)) $finish(32'sd0);
                  if ((32'sh5f5_e100>=32'sd21*bench_T404_Main_T404_Main_V_0))  begin if ((4'sd5/*5:xpc10nz*/==xpc10nz)) $display("   value=%H  has %1d ones (decimal)."
                      , $signed(32'd51*bench_T404_Main_T404_Main_V_0), ((4'sd2/*2:xpc10nz*/==xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0: Z8USCCSCALbx10ARA0RRh16hold
                      )+((4'sd3/*3:xpc10nz*/==xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0: Z8USCCSCALbx10ARA0RRh14hold)+((4'sd4/*4:xpc10nz*/==
                      xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0: Z8USCCSCALbx10ARA0RRh12hold)+((4'sd5/*5:xpc10nz*/==xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0
                      : Z8USCCSCALbx10ARA0RRh10hold));
                       end 
                   else if ((4'sd10/*10:xpc10nz*/==xpc10nz))  begin 
                          $display("   value=%H  has %1d ones (decimal).", $signed(32'd51*bench_T404_Main_T404_Main_V_0), ((4'sd7/*7:xpc10nz*/==
                          xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0: Z8USCCSCALbx10ARA0RRh10hold)+((4'sd8/*8:xpc10nz*/==xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0
                          : Z8USCCSCALbx10ARA0RRh12hold)+((4'sd9/*9:xpc10nz*/==xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0: Z8USCCSCALbx10ARA0RRh14hold
                          )+((4'sd10/*10:xpc10nz*/==xpc10nz)? A_8_US_CC_SCALbx10_ARA0_RDD0: Z8USCCSCALbx10ARA0RRh16hold));
                          $display(" Test BitTally finished.");
                           end 
                          if ((32'sd0/*0:xpc10nz*/==xpc10nz)) $display("%s%1d", "BitTally 03 Limit=", 32'sh5f5_e100);
                  if ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)) 
                  case (xpc10nz)
                      4'sd1/*1:xpc10nz*/:  xpc10nz <= 4'sd6/*6:xpc10nz*/;

                      4'sd10/*10:xpc10nz*/:  begin 
                           done <= 1'h1;
                           bench_T404_Main_T404_Main_V_0 <= 32'sd21*bench_T404_Main_T404_Main_V_0;
                           end 
                          endcase
                   else 
                  case (xpc10nz)
                      4'sd1/*1:xpc10nz*/:  xpc10nz <= 4'sd2/*2:xpc10nz*/;

                      4'sd5/*5:xpc10nz*/:  bench_T404_Main_T404_Main_V_0 <= 32'sd21*bench_T404_Main_T404_Main_V_0;
                  endcase

              case (xpc10nz)
                  32'sd0/*0:xpc10nz*/:  begin 
                       done <= 1'h0;
                       bench_T404_Main_T404_Main_V_0 <= 4'sd1;
                       xpc10nz <= 4'sd1/*1:xpc10nz*/;
                       end 
                      
                  4'sd5/*5:xpc10nz*/:  xpc10nz <= 4'sd1/*1:xpc10nz*/;

                  4'sd10/*10:xpc10nz*/:  xpc10nz <= 4'sd11/*11:xpc10nz*/;
              endcase
              if (Z8USCCSCALbx10ARA0RRh14shot0)  begin 
                       Z8USCCSCALbx10ARA0RRh14hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                       Z8USCCSCALbx10ARA0RRh14hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                       end 
                      if (Z8USCCSCALbx10ARA0RRh12shot0)  begin 
                       Z8USCCSCALbx10ARA0RRh12hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                       Z8USCCSCALbx10ARA0RRh12hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                       end 
                      if (Z8USCCSCALbx10ARA0RRh10shot0)  begin 
                       Z8USCCSCALbx10ARA0RRh10hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                       Z8USCCSCALbx10ARA0RRh10hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                       end 
                      if ((4'sd11/*11:xpc10nz*/==xpc10nz))  xpc10nz <= 4'sd11/*11:xpc10nz*/;
                  if (Z8USCCSCALbx10ARA0RRh16shot0)  Z8USCCSCALbx10ARA0RRh16hold <= A_8_US_CC_SCALbx10_ARA0_RDD0;
                  
              case (xpc10nz)
                  4'sd2/*2:xpc10nz*/:  xpc10nz <= 4'sd3/*3:xpc10nz*/;

                  4'sd3/*3:xpc10nz*/:  xpc10nz <= 4'sd4/*4:xpc10nz*/;

                  4'sd4/*4:xpc10nz*/:  xpc10nz <= 4'sd5/*5:xpc10nz*/;

                  4'sd6/*6:xpc10nz*/:  xpc10nz <= 4'sd7/*7:xpc10nz*/;

                  4'sd7/*7:xpc10nz*/:  xpc10nz <= 4'sd8/*8:xpc10nz*/;

                  4'sd8/*8:xpc10nz*/:  xpc10nz <= 4'sd9/*9:xpc10nz*/;

                  4'sd9/*9:xpc10nz*/:  xpc10nz <= 4'sd10/*10:xpc10nz*/;
              endcase
               Z8USCCSCALbx10ARA0RRh10shot0 <= ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)? (4'sd6/*6:xpc10nz*/==xpc10nz): (4'sd4
              /*4:xpc10nz*/==xpc10nz));

               Z8USCCSCALbx10ARA0RRh12shot0 <= ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)? (4'sd7/*7:xpc10nz*/==xpc10nz): (4'sd3
              /*3:xpc10nz*/==xpc10nz));

               Z8USCCSCALbx10ARA0RRh14shot0 <= ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)? (4'sd8/*8:xpc10nz*/==xpc10nz): (4'sd2
              /*2:xpc10nz*/==xpc10nz));

               Z8USCCSCALbx10ARA0RRh16shot0 <= ((32'sh5f5_e100<32'sd21*bench_T404_Main_T404_Main_V_0)? (4'sd9/*9:xpc10nz*/==xpc10nz): (4'sd1
              /*1:xpc10nz*/==xpc10nz));

               end 
              //End structure HPR bittally


       end 
      

 initial        begin 
      //ROM data table: 256 words of 8 bits.
       A_8_US_CC_SCALbx10_ARA0[0] = 8'h0;
       A_8_US_CC_SCALbx10_ARA0[1] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[2] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[3] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[4] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[5] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[6] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[7] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[8] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[9] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[10] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[11] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[12] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[13] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[14] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[15] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[16] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[17] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[18] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[19] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[20] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[21] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[22] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[23] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[24] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[25] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[26] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[27] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[28] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[29] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[30] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[31] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[32] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[33] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[34] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[35] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[36] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[37] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[38] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[39] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[40] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[41] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[42] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[43] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[44] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[45] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[46] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[47] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[48] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[49] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[50] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[51] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[52] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[53] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[54] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[55] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[56] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[57] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[58] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[59] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[60] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[61] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[62] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[63] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[64] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[65] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[66] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[67] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[68] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[69] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[70] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[71] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[72] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[73] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[74] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[75] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[76] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[77] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[78] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[79] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[80] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[81] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[82] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[83] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[84] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[85] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[86] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[87] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[88] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[89] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[90] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[91] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[92] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[93] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[94] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[95] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[96] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[97] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[98] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[99] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[100] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[101] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[102] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[103] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[104] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[105] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[106] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[107] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[108] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[109] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[110] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[111] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[112] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[113] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[114] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[115] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[116] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[117] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[118] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[119] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[120] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[121] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[122] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[123] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[124] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[125] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[126] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[127] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[128] = 8'h1;
       A_8_US_CC_SCALbx10_ARA0[129] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[130] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[131] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[132] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[133] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[134] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[135] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[136] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[137] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[138] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[139] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[140] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[141] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[142] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[143] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[144] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[145] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[146] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[147] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[148] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[149] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[150] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[151] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[152] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[153] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[154] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[155] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[156] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[157] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[158] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[159] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[160] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[161] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[162] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[163] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[164] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[165] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[166] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[167] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[168] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[169] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[170] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[171] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[172] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[173] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[174] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[175] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[176] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[177] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[178] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[179] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[180] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[181] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[182] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[183] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[184] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[185] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[186] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[187] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[188] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[189] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[190] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[191] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[192] = 8'h2;
       A_8_US_CC_SCALbx10_ARA0[193] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[194] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[195] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[196] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[197] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[198] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[199] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[200] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[201] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[202] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[203] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[204] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[205] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[206] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[207] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[208] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[209] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[210] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[211] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[212] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[213] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[214] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[215] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[216] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[217] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[218] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[219] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[220] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[221] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[222] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[223] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[224] = 8'h3;
       A_8_US_CC_SCALbx10_ARA0[225] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[226] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[227] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[228] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[229] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[230] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[231] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[232] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[233] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[234] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[235] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[236] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[237] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[238] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[239] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[240] = 8'h4;
       A_8_US_CC_SCALbx10_ARA0[241] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[242] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[243] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[244] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[245] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[246] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[247] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[248] = 8'h5;
       A_8_US_CC_SCALbx10_ARA0[249] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[250] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[251] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[252] = 8'h6;
       A_8_US_CC_SCALbx10_ARA0[253] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[254] = 8'h7;
       A_8_US_CC_SCALbx10_ARA0[255] = 8'h8;
       end 
      

// 5 vectors of width 1
// 6 vectors of width 8
// 1 vectors of width 4
// 256 array locations of width 8
// 32 bits in scalar variables
// Total state bits in module = 2137 bits.
// Total number of leaf cells = 0
endmodule