Generated bit lane 0 of code ROM 228/3811 bits Generated bit lane 1 of code ROM 175/3811 bits Generated bit lane 2 of code ROM 160/3811 bits Generated bit lane 3 of code ROM 149/3811 bits Generated bit lane 4 of code ROM 73/3811 bits Generated bit lane 5 of code ROM 106/3811 bits Generated bit lane 6 of code ROM 58/3811 bits Generated bit lane 7 of code ROM 158/3811 bits Generated bit lane 8 of code ROM 95/3811 bits Generated bit lane 9 of code ROM 74/3811 bits Generated bit lane 10 of code ROM 158/3811 bits Generated bit lane 11 of code ROM 48/3811 bits Generated bit lane 12 of code ROM 272/3811 bits Generated bit lane 13 of code ROM 276/3811 bits ROM SIZE = 3811 words of 14 bits, ones=2030, density=3 % BDD: 147732 hits, 14332 misses. Apply=0/162856 PI=12 Gcollects=0, Reorders=0 Reduce_table nodes allocated: 14 K (prev max 0 K)