David Riddoch (alumni)
User ID:djr23
Position:PhD Approved
E-mail:lce@riddoch.org.uk
Homepage:http://www.riddoch.org.uk /
College:Downing
Overview and Interests

Members of the CLAN project at AT&T Laboratories-Cambridge developed a high-performance user-level network that delivered Gbps bandwidth and very low overhead and latency. The network interface made use of a novel primitive for synchronisation -- the Tripwire. I looked at the software needed to bring the performance benefits of this technology to applications. This included the low-level system software, protocol design and middleware. I developed a software implementation of the Virtual Interface Architecture that ran over the CLAN network, and performed better than commercial hardware implementations. I also developed a CORBA ORB that achieved latency of just 8 microseconds and handled up to 145,000 requests per second.

Publications

1. David Riddoch, "Low Latency Distributed Computing," PhD thesis, University of Cambridge, Jan 2003

2. David Riddoch, Kieran Mansley, Steve Pope, "Distributed Computing with the CLAN Network," High Speed Local Networks Workshop (HSLN), Nov 2002

3. David Riddoch, Steve Pope, Kieran Mansley, "VIA over the CLAN Network," Technical Report, TR.LCE.01.2, University of Cambridge, Nov 2001

4. David Riddoch, Steve Pope, Derek Roberts, Glenford Mapp, David Clarke, David Ingram, Kieran Mansley, Andy Hopper, "Tripwire: A Synchronisation Primitive for Virtual Memory Mapped Communication," Journal of Interconnection Networks, pp. 345-364, Sep 2001

5. David Riddoch, Steve Pope, "VIA over the CLAN Network," Multi-Service Networks, Jul 2001

6. David Riddoch, Steve Pope, "A Low Overhead Application/Device-Driver Interface for User-level Networking," Parallel and Distributed Processing Techniques and Applications, Jun 2001

7. David Riddoch, Steve Pope, Derek Roberts, Glenford Mapp, David Clarke, David Ingram, Kieran Mansley, Andy Hopper, "Tripwire: A Synchronisation Primitive for Virtual Memory Mapped Communications," Proceedings of the 4th International Conference on Algorithms and Architectures for Parallel Programming, Dec 2000