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Date: Mon, 4 Jul 94 15:17:07 +0200
From: Gerd.Venzl@zfe.siemens.de (Gerd Venzl)
Message-Id: <9407041317.AA00371@koetsier.zfe.siemens.de>
To: info-hol@leopard.cs.byu.edu
Subject: Formal Hardware Verification JOB OPENING at Siemens

Siemens Corporate R&D: Formal Hardware Verification JOB OPENING
---------------------------------------------------------------

Siemens is one of the largest companies in the world-wide electrical and 
electronics industry. Application-oriented research is the basis for new 
and improved products and development processes. Computing and software 
technologies as stand alone products, as development tools and as embedded 
parts of products and systems play a dominant role. Many of the core 
technologies considered strategically important for the Company are developed 
at the Corporate Research and Development Division. 

Major activities of the Software and Engineering Department at Corporate R&D
focus on FORMAL DESIGN and FORMAL VERIFICATION technology with applications 
to digital circuits, sequential software, and reactive/concurrent systems. 
Our in-house hardware verification tools, in particular, have been successfully 
used by circuit designers in the Company for many years.

This is an opportunity to join one of the biggest R&D groups in the industry 
devoted to the advancement of formal methods and tools and their application 
to REAL-WORLD problems. 

The work is a balanced mix of applied research, demonstration of new concepts, 
implementation of prototypes, case studies and experiments, and specialist 
technical support to designers.

Employment is possible on a regular basis or as a visiting (post-doctoral) 
scientist.


Requirements:

  o  First class degree (PhD) in engineering, computer science, applied 
     mathematics or equivalent post-graduate R&D experience.

  o  Substantial experience and/or excellent own research in formal 
     verification techniques.

  o  Highly self motivated and result oriented, flexible and willing to 
     contribute to all of the work described above.

  o  Strong verbal and written communication and teamwork skills.

  o  Knowledge and experience in symbolic finite state techniques (BDDs, 
     model checking) as well as in the design and behavioural modeling of 
     digital circuits would be highly beneficial.
     

Location:

  Munich, Germany


What to do:

  If you meet the requirements and the job sounds challenging to you, 
  send your resume to:


    Gerd Venzl
			
    Siemens AG, ZFE BT SE 12
    Otto-Hahn-Ring 6
    D-81730 Munich, Germany

    e-mail: Gerd.Venzl@zfe.siemens.de