Return-Path: Return-Path: Received: from ted.cs.uidaho.edu by swan.cl.cam.ac.uk with SMTP (PP-6.0) id <03304-0@swan.cl.cam.ac.uk>; Wed, 26 Feb 1992 13:36:23 +0000 Received: by ted.cs.uidaho.edu (16.6/1.34) id AA22849; Wed, 26 Feb 92 05:23:16 -0800 Sender: info-hol-request@edu.uidaho.cs.ted Errors-To: info-hol-request@edu.uidaho.cs.ted Received: from gateway.bnr.ca by ted.cs.uidaho.edu (16.6/1.34) id AA22812; Wed, 26 Feb 92 05:23:10 -0800 Received: from BNRECADA.BNR.CA by gateway.bnr.ca (5.61/1.34) id AA28181; Wed, 26 Feb 92 08:25:29 -0500 Message-Id: <9202261325.AA28181@gateway.bnr.ca> Received: from BNRECADA.BNR.CA by BNRECADA.BNR.CA (IBM VM SMTP R1.2.1) with BSMTP id 1793; Wed, 26 Feb 92 08:25:25 EST Date: 26 Feb 92 08:25:00 EST To: mcmi!news-announce-conferences , denny , hlsw-people , info-hol , bouldin , courtois From: David (D.G.) Agnew Subject: CHDL'93 call for papers If possible please include the following announcement in any newsletter or distribution you may do. If anyone wants nicely printed hard copies to distribute, please contact me. Thanks, Dave Agnew e-mail: crm24@bnr.ca --------------------------------------------------------------- CHDL'93 call for papers: CCCC HH HH DDDDD LL II 9999 33333 CCCC HH HH DDDDDD LL 99 99 33 CC HHHHHH DD DD LL 99 99 3333 CC HHHHHH DD DD LL 99999 33 CCCC HH HH DDDDDD LLLLL 99 33 CCCC HH HH DDDD LLLLL 9999 33333 IFIP Conference on Hardware Description Languages and Their Applications Chateau Laurier Hotel Ottawa, CANADA April 26-28, 1993 CHDL '93 will be immediately followed by the VHDL International Users Forum (VIUF) April 29-30, 1993 at the Chateau Laurier TWENTIETH ANNIVERSARY OF CHDL CONFERENCE: held every 2 years since 1973, CHDL has rotated between Europe, North America and Asia. This meeting originated under IEEE/ACM sponsorship, and since 1981 has been organized by IFIP working group 10.2. The topic has a long history with over 100 HDLs published in the 1970s, but until the mid-1980s HDLs were mostly used in teaching, research and architectural modelling of computers. More recently HDLs have become central to system design and VLSI, due to many factors including: > the increasing complexity and broader usage of digital electronics, requiring increased use of modelling and simulation; > the current migration of VLSI design from schematic capture to logic synthesis based on HDLs; > the standardization of HDLs. The result is that HDL-based design methods are increasingly becoming the norm for electronic hardware design. TOPICS: The future of HDLs looks brighter than ever in the 1990s. Several emerging or potential new design technologies depend on HDLs, for example > high-level synthesis > formal verification > design frameworks > DSP design and dataflow languages > protocol specification and design languages > FSM capture, implementation and verification > code generation for on-chip embedded control > mixed hardware-software co-design and co-verification > hardware testing and testability > mixed textual/graphical design capture > HDL-based design methods e.g. executable specifications > parallel control specification for parallel processing or concurrent hardware processes AUTHOR INFORMATION: Contributions on these or related topics are desired. Regular papers and short papers are welcome. Regular papers may be on original research, or review or tutorial submissions. Short papers should be on recent research results, to be presented in a special session in a workshop format to encourage discussion. All papers will appear in the conference proceedings. Regular papers will be printed in book form as well, and selected papers will also be published in the Journal on Formal Methods in System Design. Papers (6 copies) should be submitted by Oct. 5, 1992 to OCRI (address below). For regular papers, the full paper (up to 20 double-spaced pages) should be sent. For short papers, only a 4 page summary is needed. Proposals for special sessions are also welcome, and should be sent to the conference chairman. Conference Chairman ------------------- David Agnew Bell-Northern Research P.O. Box 3511, Station C Ottawa, Ontario, CANADA K1Y 4H7 Phone: 613-763-3197 Fax: 613-763-7241 e-mail: crm24@bnr.ca Program Chairman ---------------- Prof. Luc Claesen IMEC/Kath. University of Leuven Kapeldreef, 75 B-3001 Leuven, BELGIUM Phone: (+32-16)28 12 03 Fax: (+32-16)22 94 00 e-mail: claesen@imec.be Conference Management --------------------- OCRI (Ottawa Carleton Research Institute) c/o Debby Sullivan 340 March Road, Suite 400 Kanata, Ontario, CANADA K2K 2E4 Phone: 613-592-8160 Fax: 613-592-8163 e-mail: trio@carleton.ca Track co-chairmen ----------------- Frameworks: Mark Whitton, Bell-Northern Research, Ottawa High-level synthesis: Pierre Paulin, Bell-Northern Research Formal methods: Prof. Ed Cerny, University of Montreal VHDL: Prof. Mostapha Aboulhamid, University of Montreal Important Dates --------------- September 1, 1992: Special sessions proposals due October 5, 1992: Deadline for paper submissions December 18, 1992: Notification of acceptance February 1, 1993: Camera-ready copy due Program Committee: (members of IFIP working group 10.2 on HDLs): ---------------------------------------------------------------- Einar J. Aas, Norway Mario Barbacci, USA Raul Camposano, Germany Edmund Clarke, USA Carlos Delgado Koos, Spain Reinder Hartenstein, Germany Franz Klaschka, Germany Petra Michel, Germany Adam Pawlak, Germany Franz Rammig, Germany P.A. Subrahmanyam, USA Ronald Waxman, USA Michael Yoeli, Israel F. Anceau, France Gaetano Borriello, USA Luc Claesen, Belgium Werner Damm, Germany Daniel Gajski, USA Steven Johnson, USA C.J. Koomen, Netherlands George J. Milne, Scotland Robert Piloty, Germany Peter Schwarz, Germany Mr. Tsuneta Sudo, Japan Klaus Woelcken, Germany P. Bakowski, France Dominique Borrione, France Alex Bronstein, USA John Darringer, USA Werner Grass, Germany Nabuaki Kawato, Japan David Luckham, USA Hillel Ofek, USA Paolo Prinetto, Italy William Sherwood, USA Flavio Rech Wagner, Brazil Akihiko Yamada, Japan