Date: Thu, 2 May 91 13:09:12 +0200
Message-Id: <9105021109.AA25520@esat.kuleuven.ac.be>
From: claesen <claesen%imecom@be.imec>
To: info-hol%edu.ucdavis.eecs@be.imec.imec
Subject: The European Conference on Design Automation

To: all active researchers in formal hardware design and verification.

Next year, the European Conference on Design Automation EDAC-92 will take
place in Brussels. As the topic chairman for the track of formal design and
verification, I would like to put special emphasis on this important topic,
in which currently a lot of progress in its practical application to hardware
design problems is being made. This topic will get special attention on
this CAD oriented conference.

We seek to encourage all submissions in the area of formal design and
verification among which:
        - formal hardware verification methods.
        - hardware description languages for formal design/verification
        - use of theorem provers for verification (HOL, Boyer-Moore ...)
        - Use of Binary Decision Diagrams in Design / Verification
        - F.S.M. verification.
        - Model checking.
        - design for verifiability
        - correctness preserving transformations
        - microprogram verification
        - symbolic analysis and simulation
        - timing verification
        - verification of synthesis results
        - practical applications of theorem provers.

Therefore I encourage all active researchers in formal hardware design and
verification for obtaining correct hardware, to submit papers on ongoing
research work and achievements for presentation at the EDAC conference.
I would also like to draw the attention on the possibility for organizing
demonstrations at the University booth at the conference, which is an
alternative way to communicate your research results to the CAD community
in conjunction with paper presentations.

Please notice that manuscripts are expected before 2 September 1991.
A call for papers is attached to this message. In case you submit a
contribution in this area, please do not forget to indicate the key word
for the topic area of "Formal verification and specification". We look
forward to your contributions.


Kind regards,


Luc Claesen
IMEC / Kath. Univ. Leuven
Kapeldreef 75, B-3001 Leuven
phone: +33-16-281203
fax:   +33-16-281515
email: claesen@imec.be


=======================================================================
=                                                                     =
=                 Advance Notice and Call for Papers                  =
=                                                                     =
=                           E D A C - 9 2                             =
=                                                                     =
=            The European Conference on Design Automation             =
=                                                                     =
=                   Brussels, Belgium 16-19 March 1992                =
=                                                                     =
=======================================================================

AIMS :
------

EDAC exists as a non-profit association of European DA professionals
with the sole purpose of promoting a top quality technical conference
in the field of Design Automation.  The aim is to meet the much needed
requirement for an international conference with a European flavour to
provide a significant focus and forum for electrical engineering DA
professionals.

SCOPE OF CONFERENCE :
---------------------

Emphasis will be placed on techniques and methods employed in all
aspects of the use of computers in the design of electronic equipment,
systems, boards, multi-chip modules and circuits.  The scope will cover
all areas of the design proces, from concept to manufacture and includes
CAD and DA tools for analogue, digital, VLSI, microwave and high-speed
electronics.

AREAS OF INTEREST :
-------------------

Original technical papers on (but not limited to) the following topics
are invited :

1. High level synthesis

Automatic allocation and scheduling of operations and storage.
Asynchronous system synthesis.  Synthesis of analogue systems.  Link
between layout and synthesis tools.

2. Logic and finite state machine synthesis

Combinational logic synthesis.  Technology mapping.  Hierarchical
controller synthesis.  State assignment.  Synthesis of testable
controllers.  Performance and routing driven synthesis.

3. Formal verification and specification

Transformational design and verification, guided synthesis, use of
automatic theorem proving for design correctness, symbolic simulation,
circuit debugging techniques, formal specification lunguages.

4. Layout synthesis and verification

Automatic place and route for VLSI and multichip modules, performance
driven layout, layout style comparisons, automatic analogue and digital
cell layout rule checking for submicron layout.  Automatic
characterization of layout.  Electrical verification based on layout
extraction.  Modelling and characterization of on- and off chip
interconnects.

5. Simulation

Advance simulation techniques from systems to circuit level.
Simulation accelerators.  Simulation of mixed analogue-digital systems.
Emulation techniques.  Embedded hardware- software simulation and
emulation of large systems.

6. Testing and testability

Test pattern generation and assembly for analogue and digital VLSI
systems, testability analysis.  Built-in self test.  Fault simulation,
defect modelling yield analysis.

7. CAD systems and frameworks

Architecture of CAD systems.  Frameworks, user interfaces, design
management, system partitioning techniques, manufacturing interfaces.

8. Application specific CAD for system design

Computer aids supporting design flows for telecommunication,
automotive, consumer and computer systems.  Introducing CAD.
Productivity gains.  User experiences.  Complete system design
examples.  CAD methodologies for mixed mode design paradigms such as
analogue-digital, hardware / micorcode-firmware, electromechanical systems.

SUBMISSION OF PAPERS :

Sessions and Official language

The conference will comprise contributed papers in oral sessions.  All
presentations and printed material will be in English.

Author Requirements

Intending authors should submit their papers to the Programme Chairman
to arrive at CEP in Edingburhg no later than September 2, 1991.  Each
submission should include nine stapled copies of the complete
manuscript including one cover page and one abstract page.  Any
submissions which are received by fax will not be processed.

The nine manuscript sets should include :

A cover page stating the names, affiliations and addresses of all
authors, together with the indentification, telephone and fax number of
the principal author, bearing in mind that communication for paper
acceptance and mailing of the author kit will occur in October 1991.
The cover page should also include the following signed statement:
All appropriate clearances for the publication of this paper have been
obtained, and if accepted the author will prepare the final manuscript
in time for inclusion in the Conference Proceedings and will present
the paper at the Conference.
Title and Abstract Page stating the title of the paper, a 70 word
abstract indicating what is new and significant in the results
presented, and an ordered list of key words taken from the area and
topics listed under areas of interest.
The complete draft of the paper including an outline of all
illustrations and references not exceeding 12 pages (double A4,
font>=12).  The international revieuw panel will give high preference
to papers that, excluding references, figures and tables, do not exceed
3000 words to clearly present the work, methods, results, originality,
significance, superiority and application of the techniques discussed.
As far as possible, although there will be an opportunity to update the
paper from an extended abstract, the submitted manuscript should
closely reflect the final paper as it will appear in the proceedings,
which will be 5 pages double column format.

PROCEEDINGS:

Will be published by the IEEE Computer Society Press.

DEADLINES AND KEY DATES:

        Submission of Manuscript :       2 September 1991
        Notification of Acceptance :    25 October   1991
        Final version of manuscript :    2 December  1991
        Pre-Conference Tutorials :      16 March     1992
        Conference Sessions :           17-19 March  1992

PROGRAMME CHAIR:

        Professor Hugo De Man
        c/o CEP consultants Ltd.
        26-28 Albany Street
        Edinburgh EH1 3QH
        UK

For information telephone : +44 31 557 2478  fax : +44 31 557 5749.

CONFERENCE INFORMATION :

Venue :         The conference will be held in the Palais des Congres,
                Brussels.
Accomodation :  Accommodation has been reserved nearby. Full details and
                a booking form will be included in the programme announcement
                in November 1991.
Additions to Technical Programme :
                the main emphasis will be on the verbal and poster
                presentation of the technical papers published in
                the Proceedings.  In keeping with this main objective and
                scope a number of related activities will be included.
                Pre-conference tutorials, book stalls, Focussed discussion
                groups, fringe meetings on standards and other technical
                subjects will be accommodated, a number of booths will be
                available to companies providing new and advanced products in
                this area, demonstrations of University CAD tools.
                Detais are available from the secretariat.

Posters :       In selected cases the programme review panel will offer the
                author the opportunity his paper at one of the interactive
                poster sessions.  The proceedings will contain a short form of
                the poster.

Regristation fees :
                For members of the cooperating societies, registration fees
                for the three day conference including lunches and evening
                social events will be in the order of BFR 15000.

EDAC 91 proceedings :
                the proceedings of EDAC 91 are now available and
                may be purchased from the secretariat. Please contact the
                secretariat for details.

ORGANISING AND TECHNICAL COMMITTEE:

General Chair :
        Herman Beke, EDC Leuven Belgium

Past Chair :
        Jochen Jess, Eindhoven University of Technology, The Netherlands

Programme Chair :
        Hugo De Man, KU Leuven/IMEC Belgium.

Programme Topic Chairs :

High level synthesis :
        Wolfgang Rosenstiel, Forschungszentrum Informatik, Karlsruhe FRG.
Logic and finite state machine synthesis :
        Gabriele Saucier, INPG, Grenoble, Cedex France.
Formal Verification and Specification :
        Luc Claesen, IMEC/Kath. Univ. Leuven, Belgium.
Layout synthesis and Verification:
        Gunther Koetzle IBM Laboratorium, Boeblingen FRG.
Simulation :
        Louis Vidigal, INESC Lisbon, Portugal.
Testing and Testability :
        Joachim Mucha, Hanover University FRG.
CAD systems and frameworks :
        Patrick Dewilde, Delft University, The  Netherlands.
Application Specific CAD for System Design :
        Jean Pierre Tual, Bull-systems, Les Clayes-Sous-Bois, France.

Finance Chairman :
        Ludwig Eggermont,Philips Eindhoven, The Netherlands.
Tutorials Chairman :
        Bernd Reusch, Universitat Dortmund, FRG.
Secretariat :
        Ron Hurley, CEP Consultants LTD. Edinburgh, UK
Local Arrangements :
        Patrick Pype, IMEC,Leuven,Belgium
Vendor Liaison :
        Hein van der Wildt Sagantec, the Netherlands.
Audio visual :
        Aldrik de Jongh, ESE Delft, The Netherlands.
Proceedings :
        Tony Ambler, Brunel University, Uxbridge, UK
Posters :
        Piero Capocelli, SGS-Thomson Microelectronics, Milan, Italy.
Publicity :
        Bernard Courtois,IMAG, Grenoble, France.
Fringe meetings:
        Gordon Adshead, ICL Manchester, UK
US liaison Officer:
        Jan Rabaey, University of California at Berkeley,USA
Far East liaison officer :
        Kazhuhiro Ueda, Shibaura Institute of Technology, Japan.

============================================================================