Group Echo Meeting Minutes - 22/1/99
Attendance
| Name | Email | Present? |
| Matthew Bentham | mjb67 | No |
| Trevor Boyd | tdb26 | Yes |
| David Dunwoody | dgd21 | Yes |
| Crispin Flowerday | cehf2 | Yes |
| Simon Frankau | sgf22 | Yes |
| Simon Freytag | sjf34 | Yes |
| Simon Greenway | sag25 | No |
Agenda
- Discuss research progress
- Discuss prototyping progress
- Create top-level program design
Minutes
tdb26 had been to the CL library and had found a book detailing the EDSAC down to a very low level - such that it including the binary representations of each instruction, and similarly low-level detail. This will come in extremely useful during the development of the project, as we need to not only emulate the EDSAC functions, but to simulate, as exactly as possible, how it did them also. He will photocopy the most useful parts of the book before returning it to the library.
Both cehf2 and sjf34 had been doing some prototyping. In his investigations of the Java AWT, sjf34 has created a general purpose display class that we hope to use to display memory and register contents, to simulate the EDSACs CRT displays. cehf2 has been looking into simulating EDSAC arithmetic, in particular he has been investigating big integer arithmetic, as the EDSAC has a 71-bit accumulator, which may be tricky to simulate in Java. He believes that a few days' coding will be sufficient to solve the problems in this area.
The main purpose of the meeting was to thrash out a top-level design for the simulator, so that we can start thinking about how to structure it. One we have a top-level design, we can then refine it before the major part of the programming begins. The design, as it stands at the moment, is detailed at the bottom of this document.
A final, ongoing item was for the group to continue investigating development tools, especially RCS, as the need for a version control system is growing, even at this early stage.
A heirarchical design was drafted as outlined below:
- EDSAC
- Datatypes
- Instruction(instruction, operand, type)
- ShortWord(17-bit value) // and arithmetic operations
- LongWord(35-bit value) // and arithmetic operations
- 71bit(71-bit value) // and arithmetic operations
- Kernel
- Memory
- int? SCR // 10-bit
- ShortWord OrderTank
- LongWord Multiplier
- LongWord Multiplicand
- 71bit Accumulator
- int?[] memory
- void clearMemory()
- void setShortWord(location, ShortWord)
- ShortWord getShortWord(location)
- void setLongWord(location, LongWord)
- LongWord getLongWord(location)
- void setInstruction(location, Instruction)
- Instruction getInstruction(location)
- void setSCR(value)
- int? getSCR()
- void setOrderTank(ShortWord)
- ShortWord getOrderTank()
- void setMultiplier(LongWord)
- LongWord getMultiplier()
- void setMultiplicand(LongWord)
- LongWord getMultiplicand()
- void setAccumulator(71bit)
- 71bit getAccumulator()
- CPU
- void execute() // does doInstruction(getInstruction(getSCR())) or similar
- TapeReader
- ShortWord tapesymbol2Binary(tapesymbol) // needs expansion
- GUI
- CrtDisplay
- drawCRT(height, width, type? contents)
Simulator execution cycles is along the line of:
- Kernel
- bootstrapInitialOrders()
- LoopStart:
- execute() raises EndOfTapeException
- notifyGUI() // that instruction completed
- checkGUI() // for user pressing stop button etc.
- goto LoopStart
- GUI
- wait for notifyGUI() from Kernel
- drawCRT(longtank), drawCRT(registers)
- notifyKernel if buttons pressed
Questions still to be answered include:
- Registers to go in memory or CPU?
- Initial Orders
- Clarify GUI <-> Kernel interactions
Major Decisions
- Flat memory model
- GUI to be clearly seperated from Kernel
Major Decisions
- RCS will be used as the version control system
Tasks
| Task | Name | Started | Due | Progress |
| Documentation | mjb67 | 18/1/99 | Continuous | 5% |
| Research | tdb26, sag25 | 18/1/99 | ASAP | 10% |
| Project Plan | dgd21, (mjb67) | 18/1/99 | 29/1/99 | 10% |
| Prelim Prototyping | cehf2, sgf22, sjf34 | 18/1/99 | 22/1/99 | 75% |
| Arithmetic | cehf2 | 18/1/99 | ASAP | 40% |
| Set up RCS | dgd21 | 22/1/99 | ASAP | 0% |
| Design | All | 22/1/99 | 29/1/99 | 0% |
If you spot anything wrong/missing, please email me.
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Author: David Dunwoody, 24/1/99, Draft