ECAD

Lecturer: Dr D.J. Greaves (djg@cl.cam.ac.uk)

No. of lectures + practicals: 8 + 4

This course is a prerequisite for Introduction to VLSI (Part II).

Some of the material covered in the initial lectures is vital for the mandatory ECAD+Architecture afternoon workshops.

Netlists, schematics and RTL.

Combinatorial and Register Transfer Level (RTL) design using schematics and Verilog HDL. Structural HDL. Introduction to ECAD Workshops. Demo of the cv2 compiler.

Logic modelling.

Logic modelling using four value system. Systems with more values. Event driven simulation, the Verilog/VHDL simulation cycle including delta time. Demo of the csim simulator.

Further Verilog.

Beyond RTL: behavioural descriptions of hardware. Shortcomings of Verilog and VHDL. Superstates. Synthesis from C etc. Demo of behavioural compilation.

Back-end logic synthesis.

Synthesis goals: logic minimisation, delay balance, operating frequency, area, power. Instance optimisation problem and uniquify. D-type migration. Demo of schematic entry, PCB layout and autorouter.

Chip, board and system testing.

Stuck-at fault model, fault coverage and fault simulation. Linear Test vector format. Observability, test pins and test modes, boundary and register scan. Testing components in assembled systems. Demo of test programme and stuck at faults.

ASIC design flow.

Entry, functional simulation, partition, place, route, back annotation, static timing analyser, test generation, parametric simulation, resource estimator tools, yes/no test wrappers, sign off, prototype, production, design lifetime.

Speed, complexity and folding.

Data flow graphs for digital signal processing, implementation decisions and associated tools. CATHEDRAL-II compiler. Demo of DSP compiler.

Example.

Detailed example design including hardware and software. Demo of the example design.

Recommended books:

Katz, R.H. (1994). Contemporary Logic Design. Benjamin/Cummings.

Russell, G., Kinniment, D.J., Chester, E.G. & McLauchlan, M.R. (ed.) (1985). CAD for VLSI. Van Nostrand Reinhold.

Naish, P. & Bishop, P. (1988). Designing Asics. Ellis Horwood.

Rubin, S.M. (1987). Computer Aids for VLSI Design. Addison-Wesley.

Mavor, J., Jack, M.A. & Denyer, P.B. (1983). Introduction to MOS LSI Design. Addison-Wesley.

Weste, N.H.E. & Eshraghian, K. (1993). Principles of CMOS VLSI Design: A Systems Perspective. Addison-Wesley (2nd ed.).

Thomas, D.E. & Moorby, P. (1995). The Verilog Hardware Description Language. Kluwer Academic Publishers.

Sternheim, E., Singh, R., Madhaven, R. & Trivedi, Y. (1993). Digital Design and Synthesis with Verilog HDL. Automata.