Simon's Student Projects for 2001/2002

  Contents
  • Processor design projects
  • Hardware/software codesign projects
  • Miscellaneous information (past projects & LaTeX project framework)

  Contact

 For further details please contact Simon Moore (Simon.Moore@cl.cam.ac.uk)
  Processor Design Projects

  Background  

 I have a long standing interest in processor design and implementation. Recent availability of good synthesis tools and large (over 1/2 million gate) programmable logic devices (PLDs) has made it possible to rapidly prototyle complex processors (see: http://www.fpgacpu.org/links.html). There are many possible projects in this area, but here are a few ideas.

  Project 1a

Transport triggered processors

Instructions for transport triggered processor explicitly specify the movement of data between functional units and the register file (e.g. by addressing input and output ports). Thus, the code generation part of an associated compiler actually schedules data movement within the processor. This is in contrast to a conventional instruction set where register reads/writes are specified leaving data movement (e.g. feedback paths) up to the processor to figure out. Given that wire delays are becoming more predomenent than gate delays, it is becoming increasingly important to schedule data movement rather than scheduling computation.

This project could be tackled from various angles, from a completely software project, where the processor architecture is simulated and code generation is considered, to a hardware implementation of an architecture.

  Project 1b

JCN - a clean RISC processor

AT&T Research Cambridge (just down the road) have designed a clean RISC style processor (called JCN) and have developed a backend for gcc (Gnu C compiler). Whilst the instruction set is in the public domain, the implementation is not. A reimplementation would provide the Lab with a useful building block.
  Microcode engines

  Background

 Microcoding has been used in processor design for at least 40 years and falls at a level below instructions but at a level above state machines (see Computer Design course, lecture 15). For example, AMD's 29xx series bit-slice parts contained microcode sequencers, ALUs, etc., which were widly used in the 1970s and 1980s. These days a complete microcoded system will fit in vary small area on a single ASIC. Microcode engines are typically used in modern processors to perform complex sequencing tasks, e.g. performing complex floating point or CISC style operations.

See: http://www.dacafe.com/DACafe/EDATools/EDAbooks/BitSlice/ for further information.

  Project 2a

Microcode engine sythesiser

Design a language to describe arbitrary microcode engines + a syntax directed translator.

  Project 2b

Microcoded Java interpreter

Microcode engines can be constructed at more of a structural level without call for the tool described in Project 2a. In this project you would design some proportion of a Java byte code interpreter and a simple dedicated microcontrol engine (in Verilog) to execute it.

  Project 2c

AMD29xx parts in Verilog

Design Verilog replacements for AMD's 29xx parts. Use them to build a simple microprocessor.
  Misc Links

  Past Projects  

 Project suggestions from 1995, 1996, 1997 and 1998,

  LaTeX

 A quick start guide to producing your project using LaTeX prepared by myself some time ago.

Martin Richards also has a tar file containing a demo LaTeX dissertation.

LaTeX is readily available as part of may Linux distributions. MiKTEX is an excellent public domain LaTeX for Windows.

Simon Moore, 7 June 2001