%{ ==================================================================== } %{ ==================================================================== } %{ } %{ On-Chip Network Bibliography } %{ } %{ BibTeX database file } %{ } %{ Robert D. Mullins } %{ Computer Laboratory, University of Cambridge } %{ 2007 } %{ } %{ ==================================================================== } %{ ==================================================================== } @STRING{ nocs = "Proc. of the ACM/IEEE Int. Symp. on Networks-on-Chip (NOCS)" } @InCollection{Ahonen:2004:ABF, author = "Tapani Ahonen and others", title = "A Brunch from the Coffee Table -- Case Study in {NoC} Platform Design", booktitle = "{Interconnect-Centric Design for Advanced SoC and NoC}", editor = "J. Nurmi and H. Tenhunen and J. Isoaho and A. Jantsch", ISBN = "1-4020-7835-8", publisher = "Kluwer Academic Publishers", year = "2004", pages = "425--453", } @InProceedings{Ahonen:2004:TOF, author = "Tapani Ahonen and David {Sig\"{u}enza} Tortosa and Jari Nurmi", title = "Topology Optimization for Application-Specific Networks-on-Chip", booktitle = "Proc. 6th International Workshop on System Level Interconnect Prediction", address = "Paris, France", year = "2004", } @InProceedings{Ainsworth:2007:OCP, author = "Thomas Ainsworth and Timothy Pinkston", title = "On Characterizing Performance of the {Cell} Broadband Engine Element Interconnect Bus", booktitle = nocs, month = may, year = "2007", } @MastersThesis{Akerlund:2005:IOA, author = "Daniel {\AA}kerlund", title = "Implementation of a 2x2 {NoC} with Wishbone Interface", school = "School for Information and Communication Technology, Royal Institute of Technology", year = "2005", key = "Nostrum", address = "Stockholm, Sweden", month = nov, URL = "http://www.imit.kth.se/\~axel/papers/2005/MSc-daniel-akerlund.pdf", } @InProceedings{Alessandro:2006:MRP, author = "Crescenzo D'Alessandro and Delong Shang and Alex Bystrov and Alex Yakovlev and Oleg Maevsky", title = "Multiple-Rail Phase-Encoding for {NoC}", booktitle = "12th IEEE Intl. Symp. on Asynchronous Circuits and Systems (ASYNC'06)", year = "2006", pages = "107--116", URL = "http://dx.doi.org/10.1109/ASYNC.2006.23", } @InProceedings{Alho:2003:IOI, author = "Mikko Alho and Jari Nurmi", title = "Implementation of Interface Router {IP} for {Proteo} Network-on-Chip", booktitle = "Proc. The 6th IEEE International Workshop on Design and Diagnostics of Electronics Circuits and Systems (DDECS'03)", address = "Poznan, Poland", year = "2003", } @InProceedings{Alho:2003:SBI, author = "Mikko Alho and Jari Nurmi", title = "Switch-Based Interface Router {IP} for Proteo Network-on-Chip", booktitle = "Proc. The 1st Northeast Workshop on Circuits and Systems NEWCAS", address = "Montreal, Canada", year = "2003", } @InProceedings{Ali:2005:CFF, author = "M. Ali and M. Welzl and M. Zwicknagl and S. Hellebrand", title = "Considerations for fault-tolerant network on chips", booktitle = "Proc. of the 17th Intl. Conf. on Microelectronics (ICM)", year = "2005", } @Article{Amde:2005:AOC, title = "{Asynchronous On-Chip Networks}", author = "M. Amde and T. Felicijan and A. Efthymiou and D. Edwards and L. Lavagno", year = "2005", volume = "152", number = "02", journal = "{IEE Proceedings Computers and Digital Techniques}", month = mar, } @MastersThesis{Andrzejewski:2005:ABE, author = "Marek Andrzejewski", title = "{AMBA} Bus Emulation in the {Nostrum} {NoC} using Best Effort Communication", school = "School for Information and Communication Technology, Royal Institute of Technology", year = "2005", key = "Nostrum", address = "Stockholm, Sweden", month = dec, URL = "http://www.imit.kth.se/\~axel/papers/2005/MSc-marek-andrzejewski.pdf", } @InProceedings{Angiolini:2006:CAN, author = "F Angiolini and L Benini and P Meloni and L Raffo and S Carta", title = "Contrasting a {NoC} and a traditional interconnect fabric with layout awareness", booktitle = "In Proc. Design, Automation and Test in Europe (DATE)", month = Mar, year = "2006", } @InProceedings{Ascia:2006:MMF, author = "Giuseppe Ascia and Vincenzo Catania and Maurizio Palesi", title = "Multi-objective Mapping for Mesh-based {NoC} Architectures", booktitle = "Second {IEEE/ACM/IFIP} International Conference on Hardware/Software Codesign and System Synthesis", pages = "182--187", year = "2004", address = "Stockholm, Sweden", month = sep # " 8--10", } @InProceedings{Ascia:2006:NOP, author = "Giuseppe Ascia and Vincenzo Catania and Maurizio Palesi and Davide Patti", title = "{Neighbors-on-Path}: {A} New Selection Strategy for On-Chip Networks", booktitle = "Fourth IEEE Workshop on Embedded Systems for Real Time Multimedia", pages = "79--84", year = "2006", address = "Seoul, Korea", month = oct, } @InProceedings{Avasare:2005:CEF, author = "P. Avasare and V. Nollet and J-Y. Mignolet and D. Verkest and H. Corporaal", title = "Centralized End-to-End Flow Control in a Best-Effort Network-on-Chip", booktitle = "EMSOFT '05: Proceedings of the 5th ACM international conference on Embedded software", year = "2005", pages = "17--20", address = "New York, NY, USA", publisher = "ACM Press", ISBN = "1-59593-091-4", location = "Jersey City, NJ, USA", } @Conference{Awasthi:2006:ETD, author = "M. Awasthi and R. Balasubramonian", title = "{Exploring the Design Space for 3D Clustered Architectures}", booktitle = "Proceedings of the 3rd IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers", pages = "", month = oct, year = "2006", } @Article{Bainbridge:2002:CAD, author = "W. J. Bainbridge and S. B. Furber", title = "{CHAIN: A Delay Insensitive CHip Area INterconnect}", journal = "IEEE Micro special issue on Design and Test of System on Chip", volume = "142, No.4.", pages = "16--23", month = sep, year = "2002", } @InProceedings{Bainbridge:2003:DIP, title = "{ Delay-Insensitive, Point-to-Point Interconnect using m-of-n codes}", month = May, booktitle = "{ Proceedings of the 9th IEEE Intl Symp. on Asynchronous Circuits and Systems}", pages = "132--140", year = "2003", author = "W. J. Bainbridge and W. B. Toms and D. A. Edwards and S. B. Furber", URL = "http://doi.ieeecomputersociety.org/10.1109/ASYNC.2003.1199173", } @InProceedings{Bainbridge:2004:TDA, author = "L. A. Plana W. J. Bainbridge and S. B. Furber", title = "The Design and Test of a Smartcard Chip Using a {CHAIN} Self-timed Network-on-Chip", booktitle = "Proceedings of the Design, Automation and Test in Europe Conference and Exhibition", volume = "3", pages = "274", month = feb, year = "2004", note = "ISBN 0769520855", } @Conference{Balasubramonian:2003:DMT, author = "R. Balasubramonian and S. Dwarkadas and D. H. Albonesi", title = "{Dynamically Managing the Communication-Parallelism Trade-Off in Future Clustered Processors}", booktitle = "Proceedings of ISCA-30", pages = "275--286", month = jun, year = "2003", } @InProceedings{Balasubramonian:2005:MWM, year = "2005", title = "{Microarchitectural Wire Management for Performance and Power in Partitioned Architectures}", month = feb, author = "R. Balasubramonian and N. Muralimanohar and K. Ramani and V. Venkatachalapathy", booktitle = "{11th International Symposium on High-Performance Computer Architecture (HPCA-11)}", } @Article{Balasubramonian:2006:LWP, author = "R. Balasubramonian and N. Muralimanohar and K. Ramani and L. Cheng and J. Carter", title = "{Leveraging Wire Properties at the Microarchitecture Level}", journal = "IEEE Micro", volume = "26(6)", pages = "", month = nov # "/" # dec, year = "2006", } @InProceedings{Balfour:2006:DTF, author = "James Balfour and William J. Dally", title = "Design Tradeoffs for Tiled {CMP} On-Chip Networks", booktitle = "Proceedings of the {20th ACM} International Conference on Supercomputing {(ICS)}", month = jun, year = "2006", URL = "http://cva.stanford.edu/publications/2006/jbalfour_ICS.pdf", } @InProceedings{Balkan:2004:AMP, author = "Aydin O. Balkan and Gang Qu and Uzi Vishkin", title = "{A}rbitrate-and-{M}ove {P}rimitives for {H}igh {T}hroughput {O}n-{C}hip {I}nterconnection {N}etworks", booktitle = "Proc. IEEE Int'l Symposium on Circuits and Systems (ISCAS)", year = "2004", volume = "II", pages = "441--444", address = "Vancouver", month = may, classification = "#AB.UV#", } @InProceedings{Balkan:2006:MOT, author = "Aydin O. Balkan and Gang Qu and Uzi Vishkin", title = "{A} {M}esh-of-{T}rees {I}nterconnection {N}etwork for {S}ingle-{C}hip {P}arallel {P}rocessing", booktitle = "Proceedings of the Application-Specific Systems, Architectures and Processors (ASAP)", year = "2006", pages = "73--80", } @InProceedings{Balkan:2007:LAD, author = "Aydin O. Balkan and Michael N. Horak and Gang Qu and Uzi Vishkin", title = "{L}ayout-{A}ccurate {D}esign and {I}mplementation of a {H}igh-{T}hroughput {I}nterconnection {N}etwork for {S}ingle-{C}hip {P}arallel {P}rocessing", booktitle = "Proc. IEEE Symp. on High Performance Interconnection Networks (Hot Interconnects)", year = "2007", address = "Stanford University, CA", month = aug, } @InProceedings{Banerjee:2004:APA, author = "Nilanjan Banerjee and Praveen Vellanki and Karam S. Chatha", title = "A Power and Performance Model for Network-on-Chip Architectures", booktitle = "Proc. of the Design, Automation and Test in Europe Conference (DATE)", year = "2004", URL = "http://portal.acm.org/citation.cfm?id=969210", } @InProceedings{Banerjee:2007:PEE, author = "Arnab Banerjee and Robert Mullins and Simon Moore", title = "A Power and Energy Exploration of Network-on-Chip Architectures", booktitle = nocs, month = may, year = "2007", } @InProceedings{Bartic:2003:HSN, author = "T. A. Bartic and J.-Y. Mignolet and V. Nollet and T. Marescaux and D. Verkest and S. Vernalde and R. Lauwereins", title = "Highly scalable network on chip for reconfigurable systems", booktitle = "Proc. Intl. Symp. on System-on-{C}hip", year = "2003", pages = "79--82", URL = "http://citeseer.ist.psu.edu/632599.html", } @Article{Bartic:2005:TAN, author = "T. A. Bartic and J.-Y. Mignolet and V. Nollet and T. Marescaux and D. Verkest and S. Vernalde and R. Lauwereins", title = "Topology adaptive network-on-chip design and implementation", journal = "IEE Proceedings - Computers and Digital Techniques", number = "4", month = jul, volume = "152", year = "2005", pages = "467--472", URL = "http://link.aip.org/link/?ICDTEA/152/467/1", } @InProceedings{Bartic:2006:NOC, author = "T. A. Bartic and D. Desmet and J-Y. Mignolet and T. Marescaux and D. Verkest and S. Vernalde and R. Lauwereins and J. Miller and F. Robert", title = "Network-on-{C}hip for {R}econfigurable {S}ystems: {F}rom {H}igh-{L}evel {D}esign {D}own to {I}mplementation", booktitle = "Field {P}rogrammable {L}ogic and {A}pplication", year = "2004", volume = "3203/2004", series = "Lecture Notes in Computer Science", pages = "637--647", publisher = "Springer Berlin / Heidelberg", doi = "10.1007/b99787", } @InProceedings{Beigne:2005:AAN, title = "{An Asynchronous NOC Architecture Providing Low Latency Service and its Multi-Level Design Framework}", booktitle = "{Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems}", year = "2005", author = "Edith Beigne and Fabien Clermidy and Pascal Vivet and Alain Clouard and Marc Renaudin", } @InProceedings{Beigne:2006:DOO, author = "E. Beign\'{e} and P. Vivet", title = "Design of On-chip and Off-chip Interfaces for a {GALS} No{C} Architecture", booktitle = "12th IEEE Intl. Symp. on Asynchronous Circuits and Systems (ASYNC'06)", year = "2006", pages = "172--183", URL = "http://dx.doi.org/10.1109/ASYNC.2006.16", } @InProceedings{Bengtsson:2006:OLT, author = "Tomas Bengtsson and Artur Jutman and Shashi Kumar and Zebo Peng and Raimund Ubar", title = "Off-line Testing of Delay Faults in {NoC} Interconnects", booktitle = "Proc. 9th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools (DSD)", month = sep, year = "2006", } @InProceedings{Bertozzi:2002:EEA, author = "D. Bertozzi and L. Benini and B. Ricco", title = "Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding", booktitle = "IEEE International Symposium on Circuits and Systems", OPTcrossref = "", OPTkey = "", pages = "93--96", year = "2002", OPTeditor = "", OPTvolume = "1", OPTnumber = "", OPTseries = "", OPTaddress = "", OPTmonth = "", OPTorganization = "", OPTpublisher = "", OPTnote = "", OPTannote = "", } @InProceedings{Bertozzi:2002:LPE, author = "D. Bertozzi and L. Benini and G. De Micheli", title = "Low power error resilient encoding for on-chip data buses", booktitle = "Proceedings Design, Automation and Test in Europe Conference and Exhibition", OPTcrossref = "", OPTkey = "", pages = "102--109", year = "2002", OPTeditor = "", OPTvolume = "", OPTnumber = "", OPTseries = "", OPTaddress = "", OPTmonth = "", OPTorganization = "", OPTpublisher = "", OPTnote = "", OPTannote = "", } @Article{Bertozzi:2004:XAN, year = "2004", journal = "{IEEE Circuits and Systems Magazine}", issue = "2", author = "Davide Bertozzi and Luca Benini", title = "{Xpipes: A Network-on-Chip Architecture for Gigascale Systems-on-Chip}", volume = "4", } @Article{Bertozzi:2005:ECS, author = "D. Bertozzi and L. Benini and G. De Micheli", URL = "http://infoscience.epfl.ch/getfile.py?mode=best&recid=53046", journal = "{IEEE} {T}ransactions on {CAD}", number = "6", pages = "818--831", title = "Error {C}ontrol {S}chemes for {O}n-chip {C}ommunication {L}inks: the energy-reliability trade-off", volume = "24", year = "2005", } @Article{Bertozzi:2005:NSF, author = "D. Bertozzi and A. Jalabert and S. Murali and R. Tamhankar and S. Stergiou and L. Benini and G. De Micheli", URL = "http://infoscience.epfl.ch/getfile.py?mode=best&recid=53044", journal = "{IEEE} {T}ransactions on {P}arallel and {D}istributed {S}ystems", number = "2", pages = "113--129", title = "No{C} {S}ynthesis {F}low for {C}ustomized {D}omain {S}pecific {M}utliprocessor {S}ystems-on-{C}hip", volume = "16", year = "2005", } @InProceedings{Bhojwani:2003:ICW, author = "P. Bhojwani and R. Mahapatra", title = "Interfacing Cores with On-chip Packet-Switched Networks", booktitle = "Proc. of VLSI Design", year = "2003", month = Jan, } @MastersThesis{Bhojwani:2003:MMS, author = "Praveen Bhojwani", title = "Mapping multimode system communication to a network-on-a-chip {(NoC)}", institution = "Computer Science Department, Texas A&M University, College Station, TX", month = aug, year = "2003", } @InProceedings{Bhojwani:2005:AHF, author = "P. Bhojwani and R. Mahapatra and E. J. Kim and T. Chen", title = "A Heuristic for Peak Power Constrained Design of {Network-on-Chip (NoC)} based Multimode System", booktitle = "Proc. of VLSI Design", year = "2005", month = Jan, } @InProceedings{Bhojwani:2006:CNI, author = "P. Bhojwani and R. Mahapatra", title = "Core Network Interface Architecture and Latency Constrained On-Chip Communication", booktitle = "Proc. of Int. Symp. on Quality Electronic Design (ISQED)", year = "2006", } @InProceedings{Bhojwani:2006:FEC, author = "P. Bhojwani and R. Singhal and G. Choi and R. Mahapatra", title = "Forward error correction for on-chip networks", booktitle = "Proc. of Workshop for Unique Chips and Systems (UCAS-2)", year = "2006", month = mar, } @InProceedings{Bhojwani:2007:AII, author = "P. Bhojwani and R. Mahapatra", title = "An Infrastructure-{IP} for online testing of network-on-chip based {SoCs}", booktitle = "Proc. of Int. Symp. on Quality Electronic Design (ISQED)", year = "2007", month = Mar, pages = "867--872", } @InProceedings{Bhojwani:2007:ARP, author = "P. Bhojwani and R. Mahapatra", title = "A Robust Protocol for {Concurrent On-Line Test} {(COLT)} of {NoC}-based Systems-on-a-Chip", booktitle = "Proc. of {ACM/IEEE} Design Automation Conference ({DAC})", month = june, year = "2007", } @InProceedings{Bjerregaard:2004:ACL, author = "Tobias Bjerregaard and Shankar Mahadevan and Jens Spars{\o}", year = "2004", title = "A Channel Library for Asynchronous Circuit Design Supporting Mixed-Mode Modeling", booktitle = "Proceedings of the Fourteenth International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS2004}", pages = "301--310", } @InProceedings{Bjerregaard:2004:VCD, author = "Tobias Bjerregaard and Jens Spars{\o}", year = "2004", title = "Virtual Channel Designs for Guaranteeing Bandwidth in Asynchronous Network-on-Chip", publisher = "IEEE", booktitle = "Proceedings of the IEEE Norchip Conference ({NORCHIP 2004})", } @InProceedings{Bjerregaard:2005:AOC, author = "Tobias Bjerregaard and Shankar Mahadevan and Rasmus Gr{\o}ndahl Olsen and Jens Spars{\o}", year = "2005", title = "An {OCP} compliant Network Adapter for {GALS}-based {SoC} design using the {MANGO} Network-on-Chip.", publisher = "IEEE", booktitle = "Proceedings of International Symposium on System-on-Chip 2005", } @InProceedings{Bjerregaard:2005:ARA, author = "Tobias Bjerregaard and Jens Spars{\o}", year = "2005", title = "A Router Architecture for Connection-Oriented Service Guarantees in the {MANGO} Clockless Network-on-Chip", publisher = "IEEE", booktitle = "Proceedings of Design, Automation and Testing in Europe Conference 2005 {(DATE05)}", } @InProceedings{Bjerregaard:2005:ASD, title = "{A Scheduling Discipline for Latency and Bandwidth Guarantees in Asynchronous Network-on-chip}", author = "Tobias Bjerregaard and Jens Spars{\o}", year = "2005", booktitle = "{Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems}", } @PhdThesis{Bjerregaard:2005:TMC, author = "Tobias Bjerregaard", title = "The {MANGO} clockless network-on-chip: Concepts and implementation", year = "2005", school = "Informatics and Mathematical Modelling, Technical University of Denmark, {DTU}", address = "Richard Petersens Plads, Building 321, {DK-}2800 Kgs. Lyngby", type = "", URL = "http://www2.imm.dtu.dk/pubdb/p.php?4025", } @Article{Bjerregaard:2006:ASO, author = "Tobias Bjerregaard and Shankar Mahadevan", title = "A survey of research and practices of Network-on-chip", year = "2006", journal = "ACM Computing Surveys", volume = "38", number = "1", URL = "http://portal.acm.org/citation.cfm?id=1132953", } @InProceedings{Bolotin:2004:AHE, title = "{Automatic hardware-efficient SoC integration by QoS network on chip}", month = Dec, booktitle = "{Proc. of the 11th IEEE Intl. Conf. on Electronics, Circuits and Systems (ICECS)}", pages = "483--486", year = "2004", author = "E. Bolotin and A. Morgenshtein and I. Cidon and R. Ginosar and A. Kolodny", } @Article{Bolotin:2004:CCI, author = "E. Bolotin and I. Cidon and R. Ginosar and A. Kolodny", title = "Cost Considerations in Network on Chip", journal = "Integration-The VLSI Journal, Special issue: Networks on chip and reconfigurable fabrics", volume = "38, Issue 1", pages = "19--42", month = Oct, year = "2004", } @Article{Bolotin:2004:QQA, author = "E. Bolotin and I. Cidon and R. Ginosar and A. Kolodny", title = "{QNoC: QoS} Architecture and Design Process for Network on Chip", journal = "Journal of Systems Architecture, special issue on Network on Chip", volume = "50", pages = "105--128", month = Feb, year = "2004", } @InProceedings{Bolotin:2007:PPN, author = "Evgeny Bolotin and Zvika Guz and Israel Cidon and Ran Ginosar and Avinoam Kolodny", title = "The Power of Priority: {NoC} based Distributed Cache Coherency", booktitle = nocs, month = may, year = "2007", } @InProceedings{Bononi:2006:SAA, author = "L Bononi and N Concer", title = "Simulation and analysis of network on chip architectures: ring, spidergon and {2D} mesh", booktitle = "In Proc. Design, Automation and Test in Europe (DATE)", month = Mar, year = "2006", } @InProceedings{Borrione:2007:GMF, author = "Laurence Pierre {Dominique Borrione, Amr Helmy} and Julien Schmaltz", title = "A Generic Model for Formally Verifying {NoC} Communication Architectures: {A} Case Study", booktitle = nocs, month = may, year = "2007", } @InProceedings{Bourduas:2007:HRM, author = "Stephan Bourduas and Zeljlko Zilic", title = "A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing", booktitle = nocs, month = may, year = "2007", } @InProceedings{Briere:2005:HMO, author = "Matthieu Bri\'{e}re and Emmanuel Drouard and Fabien Mieyeville and David Navarro and Ian O'Connor Fr\'{e}d\'{e}ric Gaffiot", title = "{Heterogeneous Modelling of an Optical Network-on-Chip with SystemC}", booktitle = "16th IEEE International Workshop on Rapid System Prototyping (RSP'05)", year = "2005", pages = "10--16", URL = "http://doi.ieeecomputersociety.org/10.1109/RSP.2005.25", } @InProceedings{Brinkmann:2002:OCI, author = "A. Brinkmann and J.-C. Niemann and I. Hehemann and D. Langen and M. Porrmann andU. Ruckert", title = "{On-Chip Interconnects for Next Generation System-on-Chips}", booktitle = "In Proc. of the 15th Annual IEEE International ASIC/SOC Conference", month = sep, year = "2002", } @InProceedings{Bystrov:2000:PA, title = "Priority Arbiters", author = "A. Bystrov and D. J. Kinniment and A. Yakolev", booktitle = "{Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC)}", year = "2000", } @InProceedings{Campobello:2006:GNO, author = "G Campobello and M Castano and C Ciofi and D Mangano", title = "{GALS} networks on chip: new solutions for asynchronous delay-insensitive links", booktitle = "In Proc. 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Roychowdhury and Liyang Zhang and Hyunchol Shin; Yongxi Qian", title = "{RF/wireless} interconnect for inter- and intra-chip communications", journal = "Proceedings of the IEEE", volume = "89", number = "4", month = Apr, year = "2001", pages = "456--466", } @Article{Chang:2003:NSO, title = "{Near Speed-of-Light Signaling Over On-Chip Electrical Interconnects}", journal = "{IEEE Journal of Solid-State Circuits}", month = may, author = "R. Chang and N. Talwalkar and C. Yue and S. Wong", pages = "834--838", year = "2003", volume = "38", number = "5", } @Article{Chang:2005:ARB, author = "M.-C. F. Chang and I. Verbauwhede and C. Chien and Zhiwei Xu Jongsun Kim and J. Ko and Qun Gu and Bo-Cheng Lai", title = "{Advanced RF}/baseband interconnect schemes for inter- and intra-{ULSI} communications", journal = "IEEE Trans. on Electron Devices", volume = "52", number = "7", pages = "1271--1285", year = "2005", month = Jul, } @InProceedings{Chen:2002:PPO, author = "H. Chen and B. Yao and F. Zhou and C. Cheng.", title = "{Physical Planning of On-Chip Interconnect Architectures}", booktitle = "Proceedings of International Conference on Computer Design", pages = "30--35", year = "2002", } @InProceedings{Chen:2006:CDC, author = "Guangyu Chen and Feihui Li and Mahmut Kandemir", title = "Compiler-directed channel allocation for saving power in on-chip networks", booktitle = "Proc. of the 33rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL)", year = "2006", ISBN = "1-59593-027-2", pages = "194--205", location = "Charleston, South Carolina, USA", URL = "http://doi.acm.org/10.1145/1111037.1111055", publisher = "ACM Press", address = "New York, NY, USA", } @InProceedings{Chen:2007:LLL, author = "Shuming Chen and Xiangyuan Liu", title = "A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in {VDSM} Designs", booktitle = nocs, month = may, year = "2007", } @Conference{Cheng:2005:WMF, author = "L. Cheng and N. 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Link and Dhiraj Pradhan", title = "Reuse-Based Test Access and Integrated Test Scheduling for Network-on-Chip", booktitle = "Design, Automation and Test in Europe Conference and Exhibition", publisher = "DATE 2006", month = mar, year = "2006", URL = "http://www.cs.bris.ac.uk/Publications/Papers/2000426.pdf", } @InCollection{Lu:2003:NAP, author = "Zhonghai Lu and Raimo Haukilahti", title = "{NoC} Application Programming Interfaces", booktitle = "Networks on Chip", pages = "239--260", publisher = "Kluwer Academic Publishers", key = "Nostrum", year = "2003", editor = "Axel Jantsch and Hannu Tenhunen", chapter = "12", month = feb, URL = "http://www.wkap.nl/prod/b/1-4020-7392-5", } @TechReport{Lu:2003:NOC, author = "Zhonghai Lu and Axel Jantsch", title = "Network-on-Chip Assembler Language", institution = "Institute of Microelectronics and Information Technology, Royal Institute of Technology (KTH)", key = "Nostrum", year = "2003", address = "Stockholm, Sweden", month = jun, number = "TRITA-IMIT-LECS R 03:02, version 1.0", URL = "http://www.imit.kth.se/\~zhonghai/Archive/NoC-AL-V01.pdf", } @InProceedings{Lu:2004:FAI, author = "Zhonghai Lu and Axel Jantsch", title = "Flit Admission in On-chip Wormhole-switched Networks with Virtual Channels", booktitle = "Proceedings of the International Symposium on System-on-Chip 2003", key = "Nostrum", year = "2004", month = nov, URL = "http://www.imit.kth.se/\~axel/papers/2004/SOC-Tampere-Lu.pdf", } @InProceedings{Lu:2004:FEI, author = "Zhonghai Lu and Axel Jantsch", title = "Flit Ejection in On-chip Wormhole-switched Networks with Virtual Channels", key = "Nostrum", booktitle = "Proceedings of the IEEE NorChip Conference", year = "2004", month = nov, URL = "http://www.imit.kth.se/\~axel/papers/2004/NorChip-zhonghai-lu.pdf", } @InProceedings{Lu:2005:APE, author = "Zhonghai Lu and Li Tong and Bei Yin and Axel Jantsch", title = "A power efficient flit-admission scheme for wormhole-switched networks on chip", key = "Nostrum", booktitle = "Proceedings of the 9th World Multi-Conference on Systemics, Cybernetics and Informatics", year = "2005", month = jul, URL = "http://www.imit.kth.se/\~axel/papers/2005/WMSCI-zhonghai.pdf", } @Manual{Lu:2005:AUI, title = "A User Introduction to {NNSE}: {Nostrum} {Network}-on-{Chip} Simulation Environment", key = "Nostrum, NNSE", author = "Zhonghai Lu", organization = "Royal Institute of Technology", address = "Stockholm", month = nov, year = "2005", URL = "http://www.imit.kth.se/info/FOFU/Nostrum/NNSE", } @InProceedings{Lu:2005:FAO, author = "Zhonghai Lu and Axel Jantsch and Ingo Sander", title = "Feasibility Analysis of Messages for On-chip Networks Using Wormhole Routing", key = "Nostrum", booktitle = "Proceedings of the Asian Pacific Design Automation Conference", year = "2005", URL = "http://www.imit.kth.se/\~axel/papers/2005/ASPDAC-zhonghai.pdf", } @InProceedings{Lu:2005:NNN, author = "Zhonghai Lu and Rikard Thid and Mikael Millberg and Erland Nilsson and Axel Jantsch", title = "{NNSE}: {Nostrum} Network-on-Chip Simulation Environment", key = "Nostrum, NNSE", booktitle = "Swedish System-on-Chip Conference (SSoCC'03)", year = "2005", month = apr, annotate = "not reviewed", URL = "http://www.imit.kth.se/\~axel/papers/2005/SSoCC-NNSE.pdf", } @InProceedings{Lu:2005:ROA, author = "Zhonghai Lu and Ingo Sander and Axel Jantsch", title = "Refinement of {A} Perfectly Synchronous Communication Model onto {Nostrum} {NoC} Best-Effort Communication", key = "Nostrum", booktitle = "Proceedings of the Forum on Design Languages", year = "2005", month = sep, URL = "http://www.imit.kth.se/\~axel/papers/2005/FDL-zhonghai.pdf", } @InProceedings{Lu:2005:TCF, author = "Zhonghai Lu and Axel Jantsch", title = "Traffic Configuration for Evaluating Networks on Chips", key = "Nostrum, NNSE", booktitle = "Proceedings of the 5th International Workshop on Systems on Chip (IWSOC)", year = "2005", month = jul, URL = "http://www.imit.kth.se/\~axel/papers/2005/IWSOC-zhonghai.pdf", } @InProceedings{Lu:2006:COM, author = "Zhonghai Lu and Bei Yin and Axel Jantsch", title = "Connection-oriented Multicasting in Wormhole-switched Networks on Chip", key = "Nostrum", booktitle = "Proceedings of the IEEE Computer Society Annual Symposium on VLSI", year = "2006", month = mar, URL = "http://www.imit.kth.se/\~axel/papers/2006/ISVLSI-multicast.pdf", } @InProceedings{Lu:2006:EOO, author = "Zhonghai Lu and Mingchen Zhong and Axel Jantsch", title = "Evaluation of Onchip Networks Using Deflection Routing", key = "Nostrum", booktitle = "Proceedings of GLSVLSI", year = "2006", URL = "http://www.imit.kth.se/\~axel/papers/2006/GLSVLSI-zhonghai-lu.pdf", } @InCollection{Lu:2006:RSC, author = "Zhonghai Lu and Ingo Sander and Axel Jantsch", title = "Refining Synchronous Communication onto Network-on-Chip Best-effort Services", booktitle = "Advances in Design and Specification Languages for {SoCs} - Selected Contributions from {FDL 2005}", key = "Nostrum", publisher = "Springer Verlag", year = "2006", editor = "Alain Vachoux", URL = "http://www.imit.kth.se/\~axel/papers/2006/FDL-Book-zhonghai-lu.pdf", } @InProceedings{Mahadevan:2005:ANT, author = "Shankar Mahadevan and Federico Angiolini and Michael Storgaard and Ramus Gr{\o}ndahl Olsen and Jens Spars{\o} and Jan Madsen", year = "2005", title = "A Network Traffic Generator Model for Fast Network-on-chip Simulation", publisher = "IEEE", booktitle = "Proceedings of Design, Automation and Testing in Europe Conference 2005 {(DATE05)}", } @InProceedings{Mak:2007:HAD, author = "Terrence S. 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Moore", title = "Low-Latency Virtual-Channel Routers for On-Chip Networks", booktitle = "Proc. of the 31st Annual Intl. Symp. on Computer Architecture (ISCA)", year = "2004", pages = "188--197", ISBN = "0-7695-2143-6", URL = "http://portal.acm.org/citation.cfm?id=998680.1006717", } @Misc{Mullins:2005:AVS, author = "Robert D. Mullins", title = "{Asynchronous versus synchronous design techniques for NoCs}", howpublished = "Tutorial at the International Symposium on System-on-Chip", year = "2005", URL = "http://www.cl.cam.ac.uk/users/rdm34/pubs.html", } @InProceedings{Mullins:2005:SAT, author = "Robert Mullins and Jeong-Gun Lee and Simon Moore", title = "Selecting a Timing Regime for On-Chip Networks", booktitle = "Proc. of the 17th UK Async. Forum", year = "2005", URL = "http://www.cl.cam.ac.uk/users/rdm34/pubs.html", } @InProceedings{Mullins:2006:MDP, author = "Robert Mullins", title = "Minimising Dynamic Power Consumption in On-Chip Networks", booktitle = "Proceedings of the Intl. Symp. on System-on-Chip", month = nov, year = "2006", address = "Tampere, Finland", } @InProceedings{Mullins:2006:TDA, author = "Robert D. Mullins and Andrew F. West and Simon W. Moore", title = "The Design and Implementation of a Low-Latency On-Chip Network", booktitle = "{Proceedings of the 11th Asia and South Pacific Design Automation Conference (ASP-DAC)}", year = "2006", } @Article{Murali:2005:AOE, author = "S. Murali and G. De Micheli and L. Benini and T. Theocharides and N. Vijaykrishnan and M. J. Irwin", URL = "http://infoscience.epfl.ch/getfile.py?recid=59332&mode=best", journal = "Design \& {T}est of {C}omputers", number = "5", pages = "434--442", title = "Analysis of {E}rror {R}ecovery {S}chemes for {N}etworks on {C}hips", volume = "22", year = "2005", } @InProceedings{Murali:2006:AMF, author = "Srinivasan Murali and Martijn Coenen and Andrei R\u{a}dulescu and Kees Goossens and Giovanni De Micheli", title = "A Methodology for Mapping Multiple Use-Cases on to Networks on Chip", booktitle = "Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE)", OPTpages = "", year = "2006", month = mar, } @InProceedings{Murali:2006:MAC, author = "Srinivasan Murali and Martijn Coenen and Andrei R\u{a}dulescu and Kees Goossens and Giovanni De Micheli", title = "Mapping and Configuration Methods for Multi-Use-Case Networks on Chips", booktitle = "Proc. Design Automation Conference. Asia and South Pacific (ASP-DAC)", OPTpages = "", year = "2006", month = jan, } @Conference{Muralimanohar:2006:TEO, author = "N. Muralimanohar and R. Balasubramonian", title = "{The Effect of Interconnect Design on the Performance of Large L2 Caches}", booktitle = "Proceedings of the 3rd IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers", pages = "", month = oct, year = "2006", } @Conference{Muralimanohar:2007:IDC, author = "N. Muralimanohar and R. Balasubramonian", title = "{Interconnect Design Considerations for Large NUCA Caches}", booktitle = "Proceedings of the 34th International Symposium on Computer Architecture (ISCA-34)", pages = "", month = jun, year = "2007", } @InProceedings{Nam:2001:DCS, author = "Seung Yeob Nam and Dan Keun Sung", title = "Decomposed Crossbar Switches with Multiple Input and Output Buffers", booktitle = "Proc. of IEEE GLOBECOM", year = "2001", } @InProceedings{Ngo:2005:DON, author = "Vu-Duc Ngo and Huy Nam Nguyen and Hae-Wook Choi", title = "Designing On-Chip Network Based on Optimal Latency Criteria", booktitle = "Proceedings of the Second Intl. Conf. on Embedded Software and Systems (ICESS)", year = "2005", URL = "http://www.springerlink.com/content/yx255253w13113wh/fulltext.pdf", } @InProceedings{Nicopoulos:2006:VAD, author = "Chrysostomos A. Nicopoulos and Dongkook Park and Jongman Kim and Narayanan Vijaykrishnan and Mazin S. Yousif and Chita R. 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Symp. on Microarchitecture (MICRO)", year = "2006", } @MastersThesis{Nielsen:2005:EOR, author = "Karl-Henrik Nielsen", title = "Evaluation of Real-time Performance Models in Wormhole-routed On-chip Networks", school = "Institute of Microelectronics and Information Technology, Royal Institute of Technology (KTH)", year = "2005", key = "Nostrum", address = "Stockholm, Sweden", month = apr, URL = "http://www.imit.kth.se/\~axel/papers/2005/MSc-nielsen.pdf", } @Article{Nieuwland:2002:CHA, author = "Andr\'e Nieuwland and Jeffrey Kang and Om Prakash Gangwal and Ramanathan Sethuraman and Natalino Bus\'a and Kees Goossens and Rafael Peset Llopis and Paul Lippens", title = "{C-HEAP}: {A} Heterogeneous Multi-processor Architecture Template and Scalable and Flexible Protocol for the Design of Embedded Signal Processing Systems", journal = "Design Automation for Embedded Systems", year = "2002", volume = "7", number = "3", pages = "233--270", } @MastersThesis{Nilsson:2002:DAI, author = "Erland Nilsson", title = "Design and Implementation of a Hot-potato Switch in a Network on Chip", school = "Department of Microelectronics and Information Technology, Royal Institute of Technology, IMIT/LECS 2002-11", key = "Nostrum", year = "2002", address = "Stockholm, Sweden", month = jun, URL = "http://www.imit.kth.se/\~axel/papers/2002/nilsson-masters.pdf", } @InProceedings{Nilsson:2003:EOT, author = "Erland Nilsson", title = "Experiments of the Proximity Congestion Awareness with the Nostrum backbone", key = "Nostrum", booktitle = "Proceedings of SSoCC", year = "2003", address = "", annote = "http://www.imit.kth.se/\~erlandn/Papers/2003/SSoCC/SSoCC2003.pdf", } @InProceedings{Nilsson:2003:LDW, author = "Erland Nilsson and Mikael Millberg and Johnny {\"O}berg and Axel Jantsch", title = "Load distribution with the Proximity Congestion Awareness in a Network on Chip", key = "Nostrum", booktitle = "Proceedings of the Design Automation and Test Europe (DATE)", pages = "1126--1127", year = "2003", month = mar, URL = "http://www.imit.kth.se/\~erlandn/Papers/2003/DATE/05p\_5\_191.pdf", } @InProceedings{Nilsson:2004:RPP, author = "Erland Nilsson and Johnny {\"O}berg", title = "Reducing Peak Power and Latency in 2-{D} Mesh {NoCs} using Globally Pseudochronous Locally Synchronous Clocking", booktitle = "Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis", key = "Nostrum", year = "2004", month = sep, URL = "http://www.imit.kth.se/\~axel/papers/2004/CODES+ISSS-Erland.pdf", } @InProceedings{Nilsson:2005:TOP, author = "Erland Nilsson and Johnny {\"O}berg", title = "Trading off power versus latency using {GPLS} clocking in {2D}-mesh {NoCs}", key = "Nostrum", booktitle = "Proceedings of the International Symposium on Signals, Circuits and Systems (ISSCS)", year = "2005", month = jul, URL = "http://www.imit.kth.se/\~axel/papers/2005/ISSCS-erland.pdf", } @InProceedings{Nollet:2004:OSC, author = "Vincent Nollet and Th\'{e}odore Marescaux and Diederik Verkest and Jean-Yves Mignolet and Serge Vernalde", title = "Operating-System Controlled Network-on-Chip", booktitle = "Proceedings of the 41st annual conference on Design automation (DAC)", year = "2004", pages = "256--259", month = jun, publisher = "ACM Press", ISBN = "1-58113-828-8", location = "San Diego, CA, USA", } @InProceedings{Nollet:2005:CRT, author = "V. Nollet and T. Marescaux and P. Avasare and J-Y. Mignolet", title = "Centralized Run-Time Resource Management in a Network-on-Chip Containing Reconfigurable Hardware Tiles", booktitle = "DATE '05: Proceedings of the conference on Design, Automation and Test in Europe", year = "2005", pages = "234--239", address = "Washington, DC, USA", publisher = "IEEE Computer Society", ISBN = "0-7695-2288-2", } @Book{Nurmi:2004:ICD, editor = "Jari Nurmi and Hannu Tenhunen and Jouni Isoaho and Axel Jantsch", title = "{Interconnect-Centric Design for Advanced SoC and NoC}", publisher = "Kluwer Academic Publishers", year = "2004", ISBN = "1-4020-7835-8", } @InCollection{Oberg:2003:CSF, author = "Johnny {\"O}berg", title = "Clocking Strategies for Networks on Chip", key = "Nostrum", booktitle = "Networks on Chip", pages = "153--172", publisher = "Kluwer Academic Publishers", year = "2003", editor = "Axel Jantsch and Hannu Tenhunen", chapter = "8", month = feb, URL = "http://www.wkap.nl/prod/b/1-4020-7392-5", } @InProceedings{Ogras:2005:ANA, author = "Umit Y. Ogras and Radu Marculescu", title = "Application-Specific Network-on-Chip Architecture Customization via Long-Range Link Insertion", booktitle = "Proc. IEEE/ACM Intl. Conf. on Computer Aided Design", address = "San Jose, CA", month = nov, year = "2005", URL = "http://www.ece.cmu.edu/\~sld/pubs/papers/ICCAD05_long_links_final_v5.pdf", } @InProceedings{Ogras:2005:EPC, author = "Umit Y. Ogras and Radu Marculescu", title = "Energy- and Performance-Driven No{C} Communication Architecture Synthesis Using a Decomposition Approach", booktitle = "Proc. Design, Automation and Test in Europe (DATE) Conf.", address = "Munich, Germany", month = mar, year = "2005", URL = "http://www.ece.cmu.edu/\~sld/pubs/papers/NoC_Arch_ogras05.pdf", } @InProceedings{Ogras:2005:KRP, author = "Umit Y. Ogras and Jingcao Hu and Radu Marculescu", title = "Key Research Problems in {NoC} Design: {A} Holistic Perspective", booktitle = "Proc. of the Intl. Conf. on Hardware/Software Codesign and System Synthesis", month = sep, year = "2005", URL = "http://www.ece.cmu.edu/\~sld/pubs/papers/f175-ogras.pdf", } @InProceedings{Ogras:2006:CAO, author = "Umit Y. Ogras and Radu Marculescu and Hyung Gyu Lee and Naehyuck Chang", title = "Communication Architecture Optimization: Making the Shortest Path Shorter in Regular Networks-on-Chip", booktitle = "Proc. Design, Automation and Test in Europe (DATE) Conf.", month = mar, year = "2006", address = "Munich, Germany", URL = "http://www.ece.cmu.edu/\~sld/pubs/papers/06F_3_757.pdf", } @Article{Ogras:2006:ISW, author = "Umit Y. Ogras and Radu Marculescu", title = "{"}It's a small world after all{"}: {NoC} Performance Optimization via Long Link Insertion", journal = "IEEE Trans. on Very Large Scale Integration Systems, Special Section on Hardware/Software Codesign and System Synthesis", volume = "14", number = "7", month = jul, year = "2006", URL = "http://www.ece.cmu.edu/\~sld/pubs/papers/TVLSI_July06_Special_issue.pdf", } @InProceedings{Ogras:2006:PFC, author = "Umit Y. Ogras and Radu Marculescu", title = "Prediction-based Flow Control for Network-on-Chip Traffic", booktitle = "Proc. ACM/IEEE Design Automation Conf.", month = jul, year = "2006", address = "San Francisco", URL = "http://www.ece.cmu.edu/\~sld/pubs/papers/FlowControl_final_v5.pdf", } @InProceedings{Ogras:2007:ARM, author = "Umit Y. Ogras and Radu Marculescu", title = "Analytical Router Modeling for Networks-on-Chip Performance Analysis", booktitle = "Proc. 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Dally", URL = "http://portal.acm.org/citation.cfm?id=876446", } @PhdThesis{Peh:2001:FCA, year = "2001", author = "Li-Shiuan Peh", title = "Flow control and micro-architectural mechanisms for extending performance of interconnection networks", school = "Stanford University", } @MastersThesis{Penolazzi:2005:AEP, author = "Sandro Penolazzi", title = "An Empirical Power Model of the Links and the Deflective Routing Switch in Nostrum", school = "School for Information and Communication Technology, Royal Institute of Technology", year = "2005", key = "Nostrum", address = "Stockholm, Sweden", month = dec, URL = "http://www.imit.kth.se/\~axel/papers/2005/MSc-sandro-penolazzi.pdf", } @InProceedings{Pinto:2003:ESO, author = "Alessandro Pinto and Luca P. Carloni and Alberto L. Sangiovanni-Vincentelli", title = "Efficient Synthesis of Networks On Chip", booktitle = "21st International Conference on Computer Design", pages = "5", month = oct, year = "2003", URL = "http://www.gigascale.org/pubs/509.html", } @InProceedings{Pirretti:2004:FTA, author = "M. Pirretti and G. M. Link and R. R. Brooks and N. Vijaykrishnan and M. Kandemir and M. J. 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Deprettere and J{\"r}gen Teich", } @Article{Radulescu:2004:AEN, author = "Andrei R\u{a}dulescu and John Dielissen and Santiago Gonz\'{a}lez Pestana and Om Prakash Gangwal and Edwin Rijpkema and Paul Wielage and Kees Goossens", title = "An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Programming", journal = "{IEEE} Transactions on {CAD} of Integrated Circuits and Systems", year = "2005", volume = "24", number = "1", pages = "4--17", month = jan, } @InProceedings{Radulescu:2004:AEO, author = "Andrei R\u{a}dulescu and John Dielissen and Kees Goossens and Edwin Rijpkema", title = "An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Programming", booktitle = "Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE)", pages = "878--883", year = "2004", month = feb, } @Conference{Ramani:2004:MTT, author = "K. Ramani and N. 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