@InProceedings{Beigne:2006:DOO, author = "E. Beign\'{e} and P. Vivet", title = "Design of On-chip and Off-chip Interfaces for a {GALS} No{C} Architecture", booktitle = "12th IEEE Intl. Symp. on Asynchronous Circuits and Systems (ASYNC'06)", year = "2006", pages = "172--183", URL = "http://dx.doi.org/10.1109/ASYNC.2006.16", } @InProceedings{Bormann:1997:AWF, author = "David Bormann and Peter Cheung", title = "Asynchronous Wrapper for Heterogeneous Systems", booktitle = "Proc. Intl. Conf. on Computer Design (ICCD)", year = "1997", } @InProceedings{Bormann:2005:GTC, author = "David Bormann", title = "{GALS} test chip on 130nm process", booktitle = "Proc. of the Second Workshop on Formal Methods for Globally-Asynchronous Locally-Synchronous Design", year = "2005", } @InProceedings{Bystrov:2000:PRA, title = "Priority Arbiters", author = "Alexandre V. Bystrov and D. J. Kinniment and Alexandre Yakovlev", booktitle = "{Sixth Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)}", year = "2000", } @PhdThesis{Chapiro:1984:GAL, author = "D. M. Chapiro", title = "Globally-Asynchronous Locally-Synchronous Systems", year = "1984", school = "Stanford University", month = oct, } @InProceedings{Dobkin:2004:DSI, author = "Rostislav Dobkin and Ran Ginosar and Christos P. Sotiriou", title = "Data Synchronization Issues in {GALS} {SoCs}", booktitle = "{Tenth Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)}", year = "2004", } @InCollection{Garside:2001:PPP, author = "Jim D. Garside", title = "Processors", chapter = "15", editor = "J. Spars{\o} and S. Furber", booktitle = "Principles of Asynchronous Circuit Design: A Systems Perspective", publisher = "Kluwer Academic", year = "2001", } @InProceedings{Gurkaynak:2006:GAE, author = "Frank K. {G\"{u}}rkaynak and Stephan Oetiker and Hubert Kaeslin and Norbert Felber and Wolfgang Fichtner", title = "{GALS at ETH Zurich: success or failure?}", booktitle = "{Twelfth Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)}", year = "2006", } @Article{Heath:2005:STA, author = "Matthew W. Heath and Wayne P. Burleson and Ian G. Harris", title = "Synchro-Tokens: {A} Deterministic {GALS} Methdology for Chip-Level Debug and Test", journal = "IEEE Transactions on Computers", volume = "C-54", number = "12", month = dec, year = "2005", } @Article{Josephs:1996:CDO, author = "Mark B. Josephs and Jelio T. Yantchev", title = "{CMOS} Design of the Tree Arbiter Element", journal = "IEEE Trans. on VLSI Systems", volume = "4", number = "4", month = dec, year = "1996", } @InProceedings{Kessels:2002:CST, author = "Joep Kessels and Ad Peeters and Paul Wielage and Suk-Jin Kim", title = "Clock Synchronization through Handshaking", booktitle = "{Eighth Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)}", year = "2002", } @InProceedings{Krstic:2003:NGT, booktitle = "International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)", title = "{New GALS Technique for Datapath Architectures}", author = "M. Krstic and E. Grass", year = "2003", } @InProceedings{Krstic:2005:RDG, year = "2005", title = "{Request-Driven GALS Technique for Wireless Communication System}", booktitle = "{Eleventh Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)}", author = "M. Krstic and E. Grass and C. Stahl", } @Article{Lim:1986:DMF, author = "W. Lim", title = "Design methodology for stoppable clock systems", journal = "IEE Proceedings Computers and Digital Techniques", volume = "133(pt. E)", number = "1", month = jan, year = "1986", } @InProceedings{Mekie:2006:IDF, author = "Joycee Mekie and Supratik Chakraborty and Girish Venkataramani and P. S. Thiagarajan and D. K. Sharma", title = "Interface Design for Rationally Clocked {GALS} Systems", booktitle = "Twelfth Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)", year = "2006", } @InProceedings{Moore:2000:SCC, author = "Simon W. Moore and George S. Taylor and Paul Cunningham and Robert D. Mullins and Peter Robinson", title = "Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems", booktitle = "Proc. Intl. Conf. on Computer Design (ICCD)", year = "2000", } @InProceedings{Moore:2002:PTP, year = "2002", title = "{Point to Point GALS Interconnect}", author = "Simon W. Moore and George S. Taylor and Robert D. Mullins and Peter Robinson", booktitle = "Eighth Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems (ASYNC)", } @Article{Nilsson:1996:AMD, author = "P. Nilsson and M. Torkelson", title = "A Monolithic Digital Clock-Generator for On-Chip Clocking of Custom {DSPs}", journal = "IEEE Journal of Solid-State Circuits", volume = "31", number = "5", month = may, year = "1996", } @InProceedings{Nystrom:2002:CTS, author = "Mika Nystr{\"{o}}m and Alain J. Martin", title = "Crossing the synchronous-asynchronous divide", booktitle = "Workshop on Complexity-Effective Design (WCED)", month = may, year = "2002", } @Article{Pechoucek:1976:ART, author = "Miroslav P\v{e}chouc\v{e}k", title = "Anomalous Response Times of Input Synchronizers", journal = "IEEE Transactions on Computers", volume = "C-25", number = "2", month = feb, year = "1976", } @Article{Rosenberger:1988:QMI, author = "Fred U. Rosenberger and Charles E. Molnar and Thomas J. Chaney and Ting-Pien Fang", title = "{Q-Modules}: Internally Clocked Delay-Insensitive Modules", journal = "IEEE Transactions on Computers", volume = "37", number = "9", month = sep, year = "1988", } @InCollection{Seitz:1980:SYT, author = "Charles L. Seitz", title = "System Timing", chapter = "7", editor = "Carver A. Mead and Lynn A. Conway", booktitle = "Introduction to {VLSI} Systems", publisher = "Addison Wesley", year = "1980", } @InProceedings{Sjogren:1997:ISA, author = "Allen E. Sjogren and Chris J. Myers", title = "Interfacing synchronous and asynchronous modules within a high-speed pipeline", booktitle = "Advanced Research in VLSI", month = sep, year = "1997", } @Article{VanScheik:1997:HSE, author = "W. S. VanScheik and R. F. Tinder", title = "High Speed Externally Asynchronous/ Internally Clocked Systems", journal = "IEEE Transactions on Computers", volume = "46", number = "7", month = jul, year = "1997", } @InProceedings{Yu:2006:AAA, author = "Zhiyi Yu and Michael Meeuwsen and Ryan Apperson and Omar Sattari and Michael Lai and Jeremy Webb and Eric Work and Tinoosh Mohsenin and Mandeep Singh and Bevan M. Baas", title = "An Asynchronous Array of Simple Processors for {DSP} Applications", booktitle = "IEEE International Solid-State Circuits Conference, (ISSCC '06)", month = Feb, year = "2006", } @Article{Yun:1999:PCB, author = "Kenneth Yun and Ayoob Dooply", title = "Pausible clocking based heterogeneous systems", journal = "IEEE Transactions on VLSI Systems", volume = "7", number = "4", pages = "482--487", month = dec, year = "1999", } @Article{Zhang:2000:AOV, author = "Zhang and others", title = "A {1-V} heterogeneous reconfigurable {DSP IC} for wireless basebanddigital signal processing", journal = "IEEE Journal of Solid-State Circuits", volume = "35", number = "11", month = nov, year = "2000", }