PPC LB+ctrlisync+data "DpCtrlIsyncdW Rfe DpDatadW Rfe" Cycle=Rfe DpDatadW Rfe DpCtrlIsyncdW { 0:r2=x; 0:r4=y; 1:r2=y; 1:r4=x; } P0 | P1 ; lwz r1,0(r2) | lwz r1,0(r2) ; cmpw r1,r1 | xor r3,r1,r1 ; beq LC00 | addi r3,r3,1 ; LC00: | stw r3,0(r4) ; isync | ; li r3,1 | ; stw r3,0(r4) | ; exists (0:r1=1 /\ 1:r1=1)