Run WWC+sync+addr in model, using ppcmem
PPC WWC+sync+addr "Rfe SyncdRW Rfe DpAddrdW Wse" Cycle=Rfe SyncdRW Rfe DpAddrdW Wse { 0:r2=x; 1:r2=x; 1:r4=y; 2:r2=y; 2:r5=x; } P0 | P1 | P2 ; li r1,2 | lwz r1,0(r2) | lwz r1,0(r2) ; stw r1,0(r2) | sync | xor r3,r1,r1 ; | li r3,1 | li r4,1 ; | stw r3,0(r4) | stwx r4,r3,r5 ; exists (x=2 /\ 1:r1=2 /\ 2:r1=1)