Test IRIW+dmb+ctrlisb

Run IRIW+dmb+ctrlisb in model, using armmem

ARM IRIW+dmb+ctrlisb
"Rfe DMBdRR Fre Rfe DpCtrlIsbdR Fre"
Cycle=Rfe DMBdRR Fre Rfe DpCtrlIsbdR Fre
{
%x0=x;
%x1=x; %y1=y;
%y2=y;
%y3=y; %x3=x;
}
 P0            | P1            | P2            | P3            ;
 MOV R0, #1    | LDR R0, [%x1] | MOV R0, #1    | LDR R0, [%y3] ;
 STR R0, [%x0] | DMB           | STR R0, [%y2] | CMP R0, R0    ;
               | LDR R1, [%y1] |               | BNE LC00      ;
               |               |               | LC00:         ;
               |               |               | ISB           ;
               |               |               | LDR R1, [%x3] ;
exists
(1:R0=1 /\ 1:R1=0 /\ 3:R0=1 /\ 3:R1=0)