Test IRIW+ctrlisb+ctrl

Run IRIW+ctrlisb+ctrl in model, using armmem

ARM IRIW+ctrlisb+ctrl
"Rfe DpCtrlIsbdR Fre Rfe DpCtrldR Fre"
Cycle=Rfe DpCtrldR Fre Rfe DpCtrlIsbdR Fre
{
%x0=x;
%x1=x; %y1=y;
%y2=y;
%y3=y; %x3=x;
}
 P0            | P1            | P2            | P3            ;
 MOV R0, #1    | LDR R0, [%x1] | MOV R0, #1    | LDR R0, [%y3] ;
 STR R0, [%x0] | CMP R0, R0    | STR R0, [%y2] | CMP R0, R0    ;
               | BNE LC00      |               | BNE LC01      ;
               | LC00:         |               | LC01:         ;
               | ISB           |               | LDR R1, [%x3] ;
               | LDR R1, [%y1] |               |               ;
exists
(1:R0=1 /\ 1:R1=0 /\ 3:R0=1 /\ 3:R1=0)