Test IRIW+addr+po

Run IRIW+addr+po in model, using armmem

ARM IRIW+addr+po
"Rfe DpAddrdR Fre Rfe PodRR Fre"
Cycle=Rfe PodRR Fre Rfe DpAddrdR Fre
{
%x0=x;
%x1=x; %y1=y;
%y2=y;
%y3=y; %x3=x;
}
 P0            | P1               | P2            | P3            ;
 MOV R0, #1    | LDR R0, [%x1]    | MOV R0, #1    | LDR R0, [%y3] ;
 STR R0, [%x0] | EOR R1,R0,R0     | STR R0, [%y2] | LDR R1, [%x3] ;
               | LDR R2, [R1,%y1] |               |               ;
exists
(1:R0=1 /\ 1:R2=0 /\ 3:R0=1 /\ 3:R1=0)