Run LB+addr+po in model, using armmem
ARM LB+addr+po "DpAddrdW Rfe PodRW Rfe" Cycle=Rfe PodRW Rfe DpAddrdW { %x0=x; %y0=y; %y1=y; %x1=x; } P0 | P1 ; LDR R0, [%x0] | LDR R0, [%y1] ; EOR R1,R0,R0 | MOV R1, #1 ; MOV R2, #1 | STR R1, [%x1] ; STR R2, [R1,%y0] | ; exists (0:R0=1 /\ 1:R0=1)