Research

I studied as PhD student in the Computer Architecture Group, supervised by Dr. Simon Moore. My research focused on the communication behaviour of shared-memory parallel benchmarks and the design and implementation of network-on-chip and cache coherency systems.

I am now working as a GPU Architect at NVIDIA in Santa Clara, CA.

Publications

A Communication Characterisation of Splash-2 and Parsec
Nick Barrow-Williams, Christian Fensch and Simon Moore,
Proceedings of the IEEE International Symposium on Workload Characterization (IISWC 2009).

Proximity Coherence for Chip Multiprocessors
Nick Barrow-Williams, Christian Fensch and Simon Moore,
International Conference on Parallel Architectures and Compilation Techniques (PACT 2010).

Requirements of Low Power Photonic Networks for Distributed Shared Memory Computers
Philip Watts, Nick Barrow-Williams and Simon Moore,
Optical Fiber Communication Conference and Exposition 2011.

Background

From 2003 to 2007 I studied in the Department of Electrical and Electronic Engineering of Imperial College London. During my final year I undertook a research project into On-Chip Networks for FPGA systems, supervised by Professor Peter Cheung.

In previous years I have worked at PA Consulting Group, primarily on the Aegate project, at ARM as part of the Cores Implementation Group, and as an intern at NVIDIA.

Contact

I can be contacted via my LinkedIn page.