I am a PhD student in the Computer Architecture Group supervised by Dr Robert Mullins. I am working on automatic parallelisation of irregular programs using a combination of compile-time analysis and speculation execution. Compile-time analysis can determine a good deal of information about how a program can be parallelised. However, there is a large gap between what the compiler can determine with certainty and what a runtime profiler can determine with near-certainty. Speculation is the tool to bridge this gap, enabling us to run code which we are nearly certain is parallelisable without endangering program correctness. I am investigating the tradeoff between conservative static transformation and optimistic speculation execution and working out how to combine these techniques in a real practical system. See my papers below for more details.
This work is part of the HELIX project, a collaboration between researchers in Cambridge and in Harvard University.
Previously I did the MPhil in Advanced Computer Science here at the Computer Laboratory. My thesis, supervised by Dr David Greaves, was on extending the capabilities of Kiwi, a high level synthesis compiler which compiles C# programs to Verilog. I implemented a compiler pass which detected data reuse in regular programs and generated on-chip registers to store this data and reduce the number of accesses to the off chip memory. For regular programs this is more efficient than a general purpose cache since there is no need for tag lookup. I won the Google Best Project Report Prize from the Computer Laboratory for this work.
Before that I did my Bachelor's degree in Electronic and Computer Engineering at Trinity College Dublin. For my final year project I implemented (a subset of) the Java Virtual Machine in Verilog (a Java processor). I prototyped the design on an FPGA.