This is a summary of the ARM validation tests.

All of the successful test traces are avalable in this bzip2-file:

Each line of the traces file records one test. For example, the
following line states that instruction E62EA22D, when run under
ARMv7-A, has the behaviour according to the input, output and
memory update as given in the line:

  strt (reg) @ ARCH ARMv7-A strt r10,[lr],-sp,lsr #4 @ instruction: E62EA22D input: E8000010 FFFFFFFE FF00FF00 00000001 5867A1AD A5991519 CBBC966B FE062DB3 FFFFFFFF 0E83F0CB 79883B89 9A694A33 01010101 00013274 00008A80 output: E8000010 FFFFFFFE FF00FF00 00000001 5867A1AD A5991519 CBBC966B FE062DB3 FFFFFFFF 0E83F0CB 79883B89 9A694A33 01010101 FFF12264 00008A84 00013274:66->CB 00013275:41->F0 00013276:08->83 00013277:6A->0E

In both input and output, the first hex number shows the value of
the CPSR register (E8000010), the next one is the value of
register 2 (FFFFFFFE), then r3, ..., and finally r15 (00008A80).

Memory updates are at the end of the line. The line above states
that memory at address 00013274 was initially 66 then updated to CB.

The numbers in the table below have meanings as follows, e.g.

  34 (802)  means that 34 instruction instances have been tested and that
            we have run 802 tests in total on these 34 instructions.