From: ppanda@ics.uci.edu (Preeti Ranjan Panda)
Newsgroups: comp.lang.verilog
Subject: 1995 High-Level Synthesis Design Repository now available
Date: 8 Jun 1995 17:25:00 GMT
Organization: UC Irvine Department of ICS
NNTP-Posting-Host: dz.ics.uci.edu
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[ Article crossposted from comp.cad.synthesis ]
[ Author was Preeti Ranjan Panda ]
[ Posted on 8 Jun 1995 17:21:51 GMT ]

We are pleased to announce the availability of the 1995 High-Level
Synthesis Design Repository.

The new set comprises 10 "complete" descriptions (i.e., examples with
documentation, test vectors, etc.), and 13 "partially complete" descriptions
(i.e., examples with source code and some documentation, but not well tested).
For the "complete" designs, the examples were exercised on simulators (VHDL,
Silage, etc.) and the comment blocks indicate who did the simulation
and when it was done.

Here's the list of designs:

  "Complete" Design Descriptions

        FP_Adder
        FP_Mult
        FP_Divider
        Prawn
        RT_PC
        Barcode
        QRS
        Adaptive
        Volume
        Answering Machine

  "Partially Complete" Design Descriptions

        Image Processing Examples (7)
        3rd order switchable filter
        Period Counter
        Beamformer
        Jacobian
        FFT
        Differential Heat Release Computation

The files are available by anonymous ftp from "ics.uci.edu" under
the directory "pub/HLSynth95".  See the "README" file first.

A detailed technical report (in postscript) describing the designs
is available as "HLSynth95-tr.ps". 


Regards,
Preeti R. Panda
University of California, Irvine

--
Regards,
Preeti Ranjan
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---   Mukesh's voice is better than it sounds.      ---
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