Midi Merge Example

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Midi Merge takes two inputs and produces one output. REAL TIME.


   9n kk vv       (note on)
   8n kk vv       (note off)
   9n kk 00       (note off with zero velocity)

Total design, including UARTS, about 500 lines of Verilog.

It is easy to specify all the blocks, separately in various ways, including regular expressions.

It is difficult to reduce the latency of this design without extracting a formal essence from each block and then disolving the boundaries.

We can extract the formal essence from the Verilog design. Transaction deduction from existing designs is a very commerical subject.


Home.           SRG Talk. 12 March 2003. DJ Greaves. www.cl.cam.ac.uk.