// CBG Orangepath HPR/LS System // Verilog output file generated at 1/20/2013 6:26:11 PM // CBG TOY BSV COMPILER VERSION 0.00 ALPHA 1st-Nov-2012 // /home/djg11/d320/hprls/bsvc/bsv.exe -o a.out -incdir=/home/djg11/d320/hprls/bsvc/smalltests:/home/djg11/d320/hprls/bsvc/camlib:/home/djg11/d320/hprls/bsvc/cth-tiny -cpp=disable -comb-assignment-delay=10 -vnl=dut.v -conerefine=disable cth-tiny/TinyTestBench.bsv -give-backtrace -elab-limit 10000 module dut(input CLK, input RST_N); reg TinyTestBench_mkTestBenchA_handle_output_FIRE; wire TinyTestBench_mkTestBenchA_debug_rom_FIRE; wire TinyTestBench_mkTestBenchA_debug_rom0_FIRE; wire TinyTestBench_mkTestBenchA_debug1_FIRE; reg TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; reg TinyTestBench_mkTestBenchA_tiny_execute_FIRE; reg TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE; reg TinyTestBench_mkTestBenchA_tiny_fetch_FIRE; reg TinyTestBench_mkTestBenchA_tiny_do_init_FIRE; reg [4:0] TinyTestBench_mkTestBenchA_tiny_addr_read_RV; reg [4:0] TinyTestBench_mkTestBenchA_tiny_addr_write_din; reg TinyTestBench_mkTestBenchA_tiny_addr_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_dm_theram[31:0]; reg [31:0] TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_data; reg [4:0] TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_adr; reg TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_EN; reg [4:0] TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_adr; reg [31:0] TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_RV; reg TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_EN; reg TinyTestBench_mkTestBenchA_tiny_dm_valid_read_RV; wire TinyTestBench_mkTestBenchA_tiny_dm_valid_write_din; reg TinyTestBench_mkTestBenchA_tiny_dm_valid_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_dm_lastread_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_dm_lastread_write_din; reg TinyTestBench_mkTestBenchA_tiny_dm_lastread_write_EN; reg [4:0] TinyTestBench_mkTestBenchA_tiny_dm_lastloc_read_RV; reg [4:0] TinyTestBench_mkTestBenchA_tiny_dm_lastloc_write_din; reg TinyTestBench_mkTestBenchA_tiny_dm_lastloc_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV; reg TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RDY; reg TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_EN; reg [38:0] TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value; wire TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_RDY; reg TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN; wire TinyTestBench_mkTestBenchA_tiny_dm_portAClear_RDY; wire TinyTestBench_mkTestBenchA_tiny_dm_portAClear_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_im_theram[31:0]; reg [31:0] TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_data; reg [4:0] TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_adr; reg TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_EN; reg [4:0] TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_adr; reg [31:0] TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_RV; reg TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_EN; reg TinyTestBench_mkTestBenchA_tiny_im_valid_read_RV; wire TinyTestBench_mkTestBenchA_tiny_im_valid_write_din; reg TinyTestBench_mkTestBenchA_tiny_im_valid_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_im_lastread_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_im_lastread_write_din; reg TinyTestBench_mkTestBenchA_tiny_im_lastread_write_EN; reg [4:0] TinyTestBench_mkTestBenchA_tiny_im_lastloc_read_RV; reg [4:0] TinyTestBench_mkTestBenchA_tiny_im_lastloc_write_din; reg TinyTestBench_mkTestBenchA_tiny_im_lastloc_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV; reg TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RDY; reg TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_EN; reg [38:0] TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value; wire TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_RDY; reg TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN; wire TinyTestBench_mkTestBenchA_tiny_im_portAClear_RDY; wire TinyTestBench_mkTestBenchA_tiny_im_portAClear_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_cinst_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_cinst_write_din; reg TinyTestBench_mkTestBenchA_tiny_cinst_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_valRb_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_valRb_write_din; reg TinyTestBench_mkTestBenchA_tiny_valRb_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_valRa_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_valRa_write_din; reg TinyTestBench_mkTestBenchA_tiny_valRa_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_9_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_9_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_9_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_8_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_8_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_8_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_7_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_7_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_7_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_6_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_6_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_6_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_5_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_5_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_5_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_4_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_4_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_4_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_3_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_3_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_3_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_2_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_2_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_2_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_1_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_1_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_1_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_0_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_rf_0_write_din; reg TinyTestBench_mkTestBenchA_tiny_rf_0_write_EN; reg TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV; reg TinyTestBench_mkTestBenchA_tiny_outQ_valid_write_din; reg TinyTestBench_mkTestBenchA_tiny_outQ_valid_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_outQ_datumf_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_outQ_datumf_write_din; reg TinyTestBench_mkTestBenchA_tiny_outQ_datumf_write_EN; wire TinyTestBench_mkTestBenchA_tiny_outQ_clear_RDY; wire TinyTestBench_mkTestBenchA_tiny_outQ_clear_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_outQ_first_RV; reg TinyTestBench_mkTestBenchA_tiny_outQ_first_RDY; wire TinyTestBench_mkTestBenchA_tiny_outQ_first_EN; reg TinyTestBench_mkTestBenchA_tiny_outQ_deq_RDY; reg TinyTestBench_mkTestBenchA_tiny_outQ_deq_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_outQ_enq_x1; reg TinyTestBench_mkTestBenchA_tiny_outQ_enq_RDY; reg TinyTestBench_mkTestBenchA_tiny_outQ_enq_EN; reg TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV; reg TinyTestBench_mkTestBenchA_tiny_inQ_valid_write_din; reg TinyTestBench_mkTestBenchA_tiny_inQ_valid_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_inQ_datumq_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_inQ_datumq_write_din; reg TinyTestBench_mkTestBenchA_tiny_inQ_datumq_write_EN; wire TinyTestBench_mkTestBenchA_tiny_inQ_clear_RDY; wire TinyTestBench_mkTestBenchA_tiny_inQ_clear_EN; reg TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RV; wire TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RDY; wire TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_EN; reg TinyTestBench_mkTestBenchA_tiny_inQ_notFull_RV; wire TinyTestBench_mkTestBenchA_tiny_inQ_notFull_RDY; wire TinyTestBench_mkTestBenchA_tiny_inQ_notFull_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_inQ_first_RV; reg TinyTestBench_mkTestBenchA_tiny_inQ_first_RDY; wire TinyTestBench_mkTestBenchA_tiny_inQ_first_EN; reg TinyTestBench_mkTestBenchA_tiny_inQ_deq_RDY; reg TinyTestBench_mkTestBenchA_tiny_inQ_deq_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_inQ_enq_x1; reg TinyTestBench_mkTestBenchA_tiny_inQ_enq_RDY; reg TinyTestBench_mkTestBenchA_tiny_inQ_enq_EN; reg TinyTestBench_mkTestBenchA_tiny_doSkip_read_RV; reg TinyTestBench_mkTestBenchA_tiny_doSkip_write_din; reg TinyTestBench_mkTestBenchA_tiny_doSkip_write_EN; reg [2:0] TinyTestBench_mkTestBenchA_tiny_phase_read_RV; reg [2:0] TinyTestBench_mkTestBenchA_tiny_phase_write_din; reg TinyTestBench_mkTestBenchA_tiny_phase_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_alu_read_RV; reg [31:0] TinyTestBench_mkTestBenchA_tiny_alu_write_din; reg TinyTestBench_mkTestBenchA_tiny_alu_write_EN; reg [4:0] TinyTestBench_mkTestBenchA_tiny_pc_read_RV; reg [4:0] TinyTestBench_mkTestBenchA_tiny_pc_write_din; reg TinyTestBench_mkTestBenchA_tiny_pc_write_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_out_get_RV; reg TinyTestBench_mkTestBenchA_tiny_out_get_RDY; reg TinyTestBench_mkTestBenchA_tiny_out_get_EN; reg [31:0] TinyTestBench_mkTestBenchA_tiny_in_put_value; reg TinyTestBench_mkTestBenchA_tiny_in_put_RDY; wire TinyTestBench_mkTestBenchA_tiny_in_put_EN; always @(posedge CLK ) begin //Start HPR TinyTestBench_mkTestBenchA if (TinyTestBench_mkTestBenchA_tiny_im_portAClear_EN) $display("Cleared"); if (TinyTestBench_mkTestBenchA_tiny_dm_portAClear_EN) $display("Cleared"); if (TinyTestBench_mkTestBenchA_tiny_do_init_FIRE && (7==TinyTestBench_mkTestBenchA_tiny_phase_read_RV) && (8/*8:MS*/==1+TinyTestBench_mkTestBenchA_tiny_addr_read_RV )) $display("End of prog load"); if (TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_RDY && TinyTestBench_mkTestBenchA_tiny_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==0/*0:US*/)) $display("%t: fetch", $time); if (TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/) && TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RDY ) $display(" %h %h: ", TinyTestBench_mkTestBenchA_tiny_pc_read_RV, TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV ); if (TinyTestBench_mkTestBenchA_tiny_execute_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==2/*2:US*/) && (0/*0:MS*/== (1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (0/*0:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) $finish; if (TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/)) $display("%t: doSkip = %s" , $time, (TinyTestBench_mkTestBenchA_tiny_doSkip_read_RV? "True": "False")); if ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/)) $display("OpLoadDM yes %h" , 7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV); if (((0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (0/*0:MS*/== (1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) $display("%t: rd <- %d", $time, 127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>24), ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? ((2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV: ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV : ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV : 0))): 1'bx)); if ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))) $display("Write out %h", TinyTestBench_mkTestBenchA_tiny_alu_read_RV); if ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && (7/*7:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))) begin $display("Reserved write back"); $finish; end if ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/)) $display("%t: r%d = imm = %d", $time, 127&((31'h_7fff_ffff& TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24), TinyTestBench_mkTestBenchA_tiny_alu_read_RV); if (TinyTestBench_mkTestBenchA_handle_output_FIRE && TinyTestBench_mkTestBenchA_tiny_out_get_RDY) $display("%t: output = %d\n" , $time, TinyTestBench_mkTestBenchA_tiny_out_get_RV); if (!RST_N || TinyTestBench_mkTestBenchA_tiny_pc_write_EN) TinyTestBench_mkTestBenchA_tiny_pc_read_RV <= (RST_N? TinyTestBench_mkTestBenchA_tiny_pc_write_din : 0); if (!RST_N || TinyTestBench_mkTestBenchA_tiny_alu_write_EN) TinyTestBench_mkTestBenchA_tiny_alu_read_RV <= (RST_N? TinyTestBench_mkTestBenchA_tiny_alu_write_din : 0); if (!RST_N || TinyTestBench_mkTestBenchA_tiny_phase_write_EN) TinyTestBench_mkTestBenchA_tiny_phase_read_RV <= (RST_N? TinyTestBench_mkTestBenchA_tiny_phase_write_din : 7); if (TinyTestBench_mkTestBenchA_tiny_doSkip_write_EN) TinyTestBench_mkTestBenchA_tiny_doSkip_read_RV <= TinyTestBench_mkTestBenchA_tiny_doSkip_write_din ; if (TinyTestBench_mkTestBenchA_tiny_inQ_datumq_write_EN) TinyTestBench_mkTestBenchA_tiny_inQ_datumq_read_RV <= TinyTestBench_mkTestBenchA_tiny_inQ_datumq_write_din ; if (!RST_N || TinyTestBench_mkTestBenchA_tiny_inQ_valid_write_EN) TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV <= (RST_N ? TinyTestBench_mkTestBenchA_tiny_inQ_valid_write_din: 0); if (TinyTestBench_mkTestBenchA_tiny_outQ_datumf_write_EN) TinyTestBench_mkTestBenchA_tiny_outQ_datumf_read_RV <= TinyTestBench_mkTestBenchA_tiny_outQ_datumf_write_din ; if (!RST_N || TinyTestBench_mkTestBenchA_tiny_outQ_valid_write_EN) TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV <= (RST_N ? TinyTestBench_mkTestBenchA_tiny_outQ_valid_write_din: 0); if (TinyTestBench_mkTestBenchA_tiny_rf_0_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_0_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_0_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_1_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_1_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_1_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_2_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_2_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_2_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_3_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_3_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_3_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_4_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_4_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_4_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_5_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_5_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_5_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_6_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_6_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_6_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_7_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_7_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_7_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_8_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_8_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_8_write_din ; if (TinyTestBench_mkTestBenchA_tiny_rf_9_write_EN) TinyTestBench_mkTestBenchA_tiny_rf_9_read_RV <= TinyTestBench_mkTestBenchA_tiny_rf_9_write_din ; if (TinyTestBench_mkTestBenchA_tiny_valRa_write_EN) TinyTestBench_mkTestBenchA_tiny_valRa_read_RV <= TinyTestBench_mkTestBenchA_tiny_valRa_write_din ; if (TinyTestBench_mkTestBenchA_tiny_valRb_write_EN) TinyTestBench_mkTestBenchA_tiny_valRb_read_RV <= TinyTestBench_mkTestBenchA_tiny_valRb_write_din ; if (TinyTestBench_mkTestBenchA_tiny_cinst_write_EN) TinyTestBench_mkTestBenchA_tiny_cinst_read_RV <= TinyTestBench_mkTestBenchA_tiny_cinst_write_din ; if (TinyTestBench_mkTestBenchA_tiny_im_lastloc_write_EN) TinyTestBench_mkTestBenchA_tiny_im_lastloc_read_RV <= TinyTestBench_mkTestBenchA_tiny_im_lastloc_write_din ; if (TinyTestBench_mkTestBenchA_tiny_im_lastread_write_EN) TinyTestBench_mkTestBenchA_tiny_im_lastread_read_RV <= TinyTestBench_mkTestBenchA_tiny_im_lastread_write_din ; if (!RST_N || TinyTestBench_mkTestBenchA_tiny_im_valid_write_EN) TinyTestBench_mkTestBenchA_tiny_im_valid_read_RV <= (RST_N ? TinyTestBench_mkTestBenchA_tiny_im_valid_write_din: 0); if (TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_EN) TinyTestBench_mkTestBenchA_tiny_im_theram[TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_adr ] <= TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_data; if (TinyTestBench_mkTestBenchA_tiny_dm_lastloc_write_EN) TinyTestBench_mkTestBenchA_tiny_dm_lastloc_read_RV <= TinyTestBench_mkTestBenchA_tiny_dm_lastloc_write_din ; if (TinyTestBench_mkTestBenchA_tiny_dm_lastread_write_EN) TinyTestBench_mkTestBenchA_tiny_dm_lastread_read_RV <= TinyTestBench_mkTestBenchA_tiny_dm_lastread_write_din ; if (!RST_N || TinyTestBench_mkTestBenchA_tiny_dm_valid_write_EN) TinyTestBench_mkTestBenchA_tiny_dm_valid_read_RV <= (RST_N ? TinyTestBench_mkTestBenchA_tiny_dm_valid_write_din: 0); if (TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_EN) TinyTestBench_mkTestBenchA_tiny_dm_theram[TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_adr ] <= TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_data; if (!RST_N || TinyTestBench_mkTestBenchA_tiny_addr_write_EN) TinyTestBench_mkTestBenchA_tiny_addr_read_RV <= (RST_N? TinyTestBench_mkTestBenchA_tiny_addr_write_din : 0); //End HPR TinyTestBench_mkTestBenchA end always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_RV = (!TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_EN? TinyTestBench_mkTestBenchA_tiny_dm_theram[TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_adr ]: TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_RV = (!TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_EN? TinyTestBench_mkTestBenchA_tiny_im_theram[TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_adr ]: TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_enq_RDY = !TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_deq_RDY = TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_first_RV = (TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV? (TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV? TinyTestBench_mkTestBenchA_tiny_inQ_datumq_read_RV : 1'bx): TinyTestBench_mkTestBenchA_tiny_inQ_first_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_first_RDY = TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV; assign #10 TinyTestBench_mkTestBenchA_tiny_inQ_clear_RDY = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_notFull_RV = !TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV; assign #10 TinyTestBench_mkTestBenchA_tiny_inQ_notFull_RDY = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RV = TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV; assign #10 TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RDY = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_enq_RDY = !TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_deq_RDY = TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_first_RV = (TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV? (TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV? TinyTestBench_mkTestBenchA_tiny_outQ_datumf_read_RV : 1'bx): TinyTestBench_mkTestBenchA_tiny_outQ_first_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_first_RDY = TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV; assign #10 TinyTestBench_mkTestBenchA_tiny_outQ_clear_RDY = 1; assign #10 TinyTestBench_mkTestBenchA_tiny_im_portAClear_RDY = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV = (TinyTestBench_mkTestBenchA_tiny_im_valid_read_RV? (TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_EN && TinyTestBench_mkTestBenchA_tiny_im_valid_read_RV ? TinyTestBench_mkTestBenchA_tiny_im_lastread_read_RV: 1'bx): TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RDY = TinyTestBench_mkTestBenchA_tiny_im_valid_read_RV; assign #10 TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_RDY = 1; assign #10 TinyTestBench_mkTestBenchA_tiny_dm_portAClear_RDY = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV = (TinyTestBench_mkTestBenchA_tiny_dm_valid_read_RV? (TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_EN && TinyTestBench_mkTestBenchA_tiny_dm_valid_read_RV ? TinyTestBench_mkTestBenchA_tiny_dm_lastread_read_RV: 1'bx): TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RDY = TinyTestBench_mkTestBenchA_tiny_dm_valid_read_RV; assign #10 TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_RDY = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_do_init_FIRE = (7==TinyTestBench_mkTestBenchA_tiny_phase_read_RV) && TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_RDY; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_fetch_FIRE = TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_RDY && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==0/*0:US*/); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE = (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/) && TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RDY; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_execute_FIRE = (((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))? 1'd1: (1/*1:MS*/!=(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV >>31)))) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV== 2/*2:US*/); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_write_back_FIRE = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))? (((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? 1'd1: (5/*5:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (0/*0:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) && (1/*1:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (2/*2:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (3/*3:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) || (5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2 /*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/): (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_out_get_RV = (TinyTestBench_mkTestBenchA_tiny_out_get_EN? TinyTestBench_mkTestBenchA_tiny_outQ_first_RV: 1'bx); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_out_get_RDY = TinyTestBench_mkTestBenchA_tiny_outQ_deq_RDY && TinyTestBench_mkTestBenchA_tiny_outQ_first_RDY; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_in_put_RDY = TinyTestBench_mkTestBenchA_tiny_inQ_enq_RDY; assign #10 TinyTestBench_mkTestBenchA_debug1_FIRE = 0; assign #10 TinyTestBench_mkTestBenchA_debug_rom0_FIRE = 0; assign #10 TinyTestBench_mkTestBenchA_debug_rom_FIRE = 0; always @(*) #10 TinyTestBench_mkTestBenchA_handle_output_FIRE = TinyTestBench_mkTestBenchA_tiny_out_get_RDY; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_out_get_EN = TinyTestBench_mkTestBenchA_handle_output_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_valRb_write_EN = TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_valRb_write_din = ((9/*9:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_9_read_RV: ((8 /*8:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_8_read_RV: ((7/*7:MS*/== (127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_7_read_RV: ((6/*6:MS*/==(127 &(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_6_read_RV: ((5/*5:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV >>10)))? TinyTestBench_mkTestBenchA_tiny_rf_5_read_RV: ((4/*4:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10 )))? TinyTestBench_mkTestBenchA_tiny_rf_4_read_RV: ((3/*3:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_3_read_RV : ((2/*2:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_2_read_RV: ((1 /*1:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>10)))? TinyTestBench_mkTestBenchA_tiny_rf_1_read_RV: TinyTestBench_mkTestBenchA_tiny_rf_0_read_RV ))))))))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_EN = TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_lastloc_write_EN = TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_lastloc_write_din = 31&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>32); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_EN = TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN && !(1&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>38)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_adr = 31&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>32); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_EN = TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN && !(!(1&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>38))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_adr = 31&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>32); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_theram_native_write_data = 32'h_ffff_ffff&TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_lastread_write_EN = TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN && !(1&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>38)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_lastread_write_din = TinyTestBench_mkTestBenchA_tiny_dm_theram_native_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_valid_write_EN = TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN && !(1&(TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value>>38)); assign #10 TinyTestBench_mkTestBenchA_tiny_dm_valid_write_din = 1; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_addr_write_EN = TinyTestBench_mkTestBenchA_tiny_do_init_FIRE && (7==TinyTestBench_mkTestBenchA_tiny_phase_read_RV); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_addr_write_din = 1+TinyTestBench_mkTestBenchA_tiny_addr_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_1_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (1/*1:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_1_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (1/*1:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_phase_write_EN = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))? (((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? 1'd1: (7/*7:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (5/*5:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) && (0/*0:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (1/*1:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (2/*2:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (3/*3:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) || (7/*7:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE || (((0/*0:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5)))? ((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))): (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) && (3/*3:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) && (2/*2:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) && (1/*1:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5)))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) && (3/*3:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) && (2/*2:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) && (1/*1:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==2/*2:US*/) && TinyTestBench_mkTestBenchA_tiny_execute_FIRE: (1/*1:MS*/!=(1 &(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE || (1/*1:MS*/!=(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==2/*2:US*/) && TinyTestBench_mkTestBenchA_tiny_execute_FIRE) || TinyTestBench_mkTestBenchA_tiny_do_init_FIRE && (7==TinyTestBench_mkTestBenchA_tiny_phase_read_RV ) && (8/*8:MS*/==1+TinyTestBench_mkTestBenchA_tiny_addr_read_RV) || TinyTestBench_mkTestBenchA_tiny_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==0/*0:US*/) || TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==2/*2:US*/) && TinyTestBench_mkTestBenchA_tiny_execute_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_phase_write_din = ((((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))? ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? 1'd1: (7/*7:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (5/*5:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) && (0/*0:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (1/*1:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (2/*2:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) && (3/*3:MS*/!=(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) || (7/*7:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)): (1/*1:MS*/!=(1& (TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE? 0: ((((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>> 31)))? ((0/*0:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5)))? ((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))): (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) && (3/*3:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) && (2/*2:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) && (1/*1:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5)))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) && (3/*3:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) && (2/*2:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) && (1/*1:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))): (1/*1:MS*/!=(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV >>31)))) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV== 2/*2:US*/) && TinyTestBench_mkTestBenchA_tiny_execute_FIRE? 3: (TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==1/*1:US*/)? 2: (TinyTestBench_mkTestBenchA_tiny_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==0/*0:US*/)? 1: 0)))); assign #10 TinyTestBench_mkTestBenchA_tiny_im_portAClear_EN = 0; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_doSkip_write_EN = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV >>31)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==2/*2:US*/) && TinyTestBench_mkTestBenchA_tiny_execute_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_doSkip_write_din = (TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RV && (3/*3:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3 ))) || (0==TinyTestBench_mkTestBenchA_tiny_alu_read_RV) && (2/*2:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>3))) || (TinyTestBench_mkTestBenchA_tiny_alu_read_RV<0) && (1/*1:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>3)))) && !TinyTestBench_mkTestBenchA_tiny_execute_FIRE || (TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RV && (3/*3:MS*/==(3&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3))) || (0==TinyTestBench_mkTestBenchA_tiny_alu_read_RV) && (2/*2:MS*/==(3&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3))) || (TinyTestBench_mkTestBenchA_tiny_alu_read_RV<0) && (1/*1:MS*/==(3&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV!=2/*2:US*/) || (1/*1:MS*/!=(1 &(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_inQ_notEmpty_RV && (3/*3:MS*/==(3&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3))) || (1/*1:MS*/!=(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (0== TinyTestBench_mkTestBenchA_tiny_alu_read_RV) && (2/*2:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3))) || (1/*1:MS*/!=(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (TinyTestBench_mkTestBenchA_tiny_alu_read_RV<0) && (1/*1:MS*/== (3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>3))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_pc_write_EN = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV >>31)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_pc_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/)? 1+TinyTestBench_mkTestBenchA_tiny_pc_read_RV: (TinyTestBench_mkTestBenchA_tiny_doSkip_read_RV? 2+TinyTestBench_mkTestBenchA_tiny_pc_read_RV : ((6/*6:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? 31&TinyTestBench_mkTestBenchA_tiny_alu_read_RV: 1+TinyTestBench_mkTestBenchA_tiny_pc_read_RV ))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_enq_EN = (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_enq_x1 = TinyTestBench_mkTestBenchA_tiny_alu_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_deq_EN = TinyTestBench_mkTestBenchA_tiny_out_get_EN; assign #10 TinyTestBench_mkTestBenchA_tiny_outQ_clear_EN = 0; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_valid_write_EN = (TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV? TinyTestBench_mkTestBenchA_tiny_outQ_deq_EN: TinyTestBench_mkTestBenchA_tiny_outQ_enq_EN ); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_valid_write_din = (TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV && TinyTestBench_mkTestBenchA_tiny_outQ_deq_EN? 0: 1); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_datumf_write_EN = TinyTestBench_mkTestBenchA_tiny_outQ_enq_EN && !TinyTestBench_mkTestBenchA_tiny_outQ_valid_read_RV || TinyTestBench_mkTestBenchA_tiny_outQ_clear_EN ; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_outQ_datumf_write_din = (TinyTestBench_mkTestBenchA_tiny_outQ_clear_EN? 0: TinyTestBench_mkTestBenchA_tiny_outQ_enq_x1); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_2_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (2/*2:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_2_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (2/*2:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_3_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (3/*3:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_3_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (3/*3:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_4_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (4/*4:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_4_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (4/*4:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_5_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (5/*5:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_5_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (5/*5:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_6_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (6/*6:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_6_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (6/*6:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_7_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (7/*7:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_7_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (7/*7:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_8_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (8/*8:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_8_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (8/*8:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_9_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (9/*9:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_9_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (9/*9:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_EN = TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_lastloc_write_EN = TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_lastloc_write_din = 31&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>32); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_EN = TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN && !(1&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>38)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_adr = 31&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>32); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_EN = TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN && !(!(1&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>38))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_adr = 31&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>32); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_theram_native_write_data = 32'h_ffff_ffff&TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_lastread_write_EN = TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN && !(1&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>38)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_lastread_write_din = TinyTestBench_mkTestBenchA_tiny_im_theram_native_read_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_valid_write_EN = TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN && !(1&(TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value>>38)); assign #10 TinyTestBench_mkTestBenchA_tiny_im_valid_write_din = 1; assign #10 TinyTestBench_mkTestBenchA_tiny_dm_portAClear_EN = 0; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_EN = (TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || TinyTestBench_mkTestBenchA_tiny_execute_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==2/*2:US*/) && (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_dm_portA_request_put_value = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? 39'h40_0000_0000|(32'h_ffff_ffff&TinyTestBench_mkTestBenchA_tiny_valRa_read_RV )|((31&TinyTestBench_mkTestBenchA_tiny_valRb_read_RV)<<32): ((31&TinyTestBench_mkTestBenchA_tiny_valRb_read_RV)<<32)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_0_write_EN = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) || ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0 /*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))) && (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) && (0/*0:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_rf_0_write_din = ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (0/*0:MS*/==(127&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>24)))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1 /*1:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? ((2/*2:MS*/== (7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (3/*3:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (1/*1:MS*/==(7 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)) || (0/*0:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_alu_read_RV : ((5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? TinyTestBench_mkTestBenchA_tiny_inQ_first_RV: ((4/*4:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV ))? TinyTestBench_mkTestBenchA_tiny_dm_portA_response_get_RV: 0))): 1'bx)); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_cinst_write_EN = TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_cinst_write_din = TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_valRa_write_EN = TinyTestBench_mkTestBenchA_tiny_register_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==1/*1:US*/); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_valRa_write_din = ((9/*9:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_9_read_RV: ((8 /*8:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_8_read_RV: ((7/*7:MS*/== (127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_7_read_RV: ((6/*6:MS*/==(127 &(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_6_read_RV: ((5/*5:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV >>17)))? TinyTestBench_mkTestBenchA_tiny_rf_5_read_RV: ((4/*4:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17 )))? TinyTestBench_mkTestBenchA_tiny_rf_4_read_RV: ((3/*3:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_3_read_RV : ((2/*2:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_2_read_RV: ((1 /*1:MS*/==(127&(TinyTestBench_mkTestBenchA_tiny_im_portA_response_get_RV>>17)))? TinyTestBench_mkTestBenchA_tiny_rf_1_read_RV: TinyTestBench_mkTestBenchA_tiny_rf_0_read_RV ))))))))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_EN = TinyTestBench_mkTestBenchA_tiny_do_init_FIRE && (7==TinyTestBench_mkTestBenchA_tiny_phase_read_RV) || TinyTestBench_mkTestBenchA_tiny_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==0/*0:US*/) || (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==3/*3:US*/) && (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_im_portA_request_put_value = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (2/*2:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV))? 39'h40_0000_0000|(32'h_ffff_ffff&TinyTestBench_mkTestBenchA_tiny_valRa_read_RV )|((31&TinyTestBench_mkTestBenchA_tiny_valRb_read_RV)<<32): (TinyTestBench_mkTestBenchA_tiny_fetch_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==0/*0:US*/)? ((31&TinyTestBench_mkTestBenchA_tiny_pc_read_RV)<<32): 39'h40_0000_0000|(32'h_ffff_ffff&((0==TinyTestBench_mkTestBenchA_tiny_addr_read_RV )? 32'h_8000_0000: ((1==TinyTestBench_mkTestBenchA_tiny_addr_read_RV)? 32'h_8100_000a: ((2==TinyTestBench_mkTestBenchA_tiny_addr_read_RV )? 32'h_8200_0000|(16777215&(TinyTestBench_mkTestBenchA_tiny_do_init_FIRE && (7==TinyTestBench_mkTestBenchA_tiny_phase_read_RV)? 3: 1'bx )): ((3==TinyTestBench_mkTestBenchA_tiny_addr_read_RV)? 16778627: ((4==TinyTestBench_mkTestBenchA_tiny_addr_read_RV)? 50594454: ((5== TinyTestBench_mkTestBenchA_tiny_addr_read_RV)? 903: "do not edit this string: off end of list")))))))|((31&TinyTestBench_mkTestBenchA_tiny_addr_read_RV )<<32))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_alu_write_EN = (((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))? ((0/*0:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5)))? ((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))): (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) && (3/*3:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) && (2/*2:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) && (1/*1:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5)))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) && (3/*3:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))) && (2/*2:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) || (((0/*0:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1'd1: (6/*6:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (5/*5:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (4/*4:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (3/*3:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) && (2/*2:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) && (1/*1:MS*/!=(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) || (6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7))) || (2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7))) || (1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))) && (1/*1:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))): (1/*1:MS*/!=(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))) || (1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV >>31)))) && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV==2/*2:US*/) && TinyTestBench_mkTestBenchA_tiny_execute_FIRE; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_alu_write_din = ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (0/*0:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5)))? ((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV +TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV +(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>> 7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV&TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV|TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0))))))): ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (1 /*1:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5)))? (1&((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? 1&(TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV>>31): ((1/*1:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1&(TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV )>>31): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1&(1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV >>31): ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1&(-1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV >>31): ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1&((TinyTestBench_mkTestBenchA_tiny_valRa_read_RV &TinyTestBench_mkTestBenchA_tiny_valRb_read_RV)>>31): ((5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>> 7)))? 1&((TinyTestBench_mkTestBenchA_tiny_valRa_read_RV|TinyTestBench_mkTestBenchA_tiny_valRb_read_RV)>>31): ((6/*6:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1&((TinyTestBench_mkTestBenchA_tiny_valRa_read_RV^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV )>>31): 0))))))))|((31'h_7fff_ffff&((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV +TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV +(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>> 7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV&TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV|TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0))))))))<<1): ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (2/*2:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5)))? (255&(((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV ): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV &TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV |TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0)))))))>>24))|((16777215&((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV ): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV &TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV |TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0))))))))<<8): ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (3/*3:MS*/==(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5)))? (65535&(((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV ): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV &TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV |TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0)))))))>>16))|((65535&((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV+(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV ): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV &TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV |TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0))))))))<<16): ((0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && (0/*0:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) && (1/*1:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5))) && (2/*2:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>5))) && (3/*3:MS*/!=(3&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>5)))? ((0/*0:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV +TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((1/*1:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV +(0-TinyTestBench_mkTestBenchA_tiny_valRb_read_RV): ((2/*2:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>> 7)))? 1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((3/*3:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? -1+TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((4/*4:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV )>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV&TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: ((5/*5:MS*/==(7&((31'h_7fff_ffff &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV|TinyTestBench_mkTestBenchA_tiny_valRb_read_RV : ((6/*6:MS*/==(7&((31'h_7fff_ffff&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)>>7)))? TinyTestBench_mkTestBenchA_tiny_valRa_read_RV ^TinyTestBench_mkTestBenchA_tiny_valRb_read_RV: 0))))))): ((1/*1:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31)))? 16777215 &TinyTestBench_mkTestBenchA_tiny_cinst_read_RV: 0)))))); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_valid_write_EN = TinyTestBench_mkTestBenchA_tiny_inQ_enq_EN && !TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV || TinyTestBench_mkTestBenchA_tiny_inQ_clear_EN ; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_valid_write_din = (TinyTestBench_mkTestBenchA_tiny_inQ_clear_EN? 0: 1); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_datumq_write_EN = (TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV? TinyTestBench_mkTestBenchA_tiny_inQ_deq_EN: TinyTestBench_mkTestBenchA_tiny_inQ_enq_EN ); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_datumq_write_din = (TinyTestBench_mkTestBenchA_tiny_inQ_valid_read_RV && TinyTestBench_mkTestBenchA_tiny_inQ_deq_EN? 0: TinyTestBench_mkTestBenchA_tiny_inQ_enq_x1 ); always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_enq_EN = TinyTestBench_mkTestBenchA_tiny_in_put_EN; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_enq_x1 = TinyTestBench_mkTestBenchA_tiny_in_put_value; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_inQ_deq_EN = (0/*0:MS*/==(1&(TinyTestBench_mkTestBenchA_tiny_cinst_read_RV>>31))) && TinyTestBench_mkTestBenchA_tiny_write_back_FIRE && (TinyTestBench_mkTestBenchA_tiny_phase_read_RV ==3/*3:US*/) && (5/*5:MS*/==(7&TinyTestBench_mkTestBenchA_tiny_cinst_read_RV)); assign #10 TinyTestBench_mkTestBenchA_tiny_inQ_clear_EN = 0; assign #10 TinyTestBench_mkTestBenchA_tiny_in_put_EN = 0; always @(*) #10 TinyTestBench_mkTestBenchA_tiny_in_put_value = 1'bx; // Total area 0 // 67 vectors of width 1 // 2 vectors of width 3 // 12 vectors of width 5 // 48 vectors of width 32 // 2 vectors of width 39 // 64 array locations of width 32 // Total state bits in module = 3795 bits. // 22 continuously assigned (wire/non-state) bits // Total number of leaf cells = 0 endmodule // // eof (HPR/LS Verilog)