Account for the case where _dest is not dword aligned. This requires reading data from the FIFO into a uint32_t temp buffer, then moving it into the data buffer.
This is here because of a possible hardware bug. Spec says that on SPLIT-ISOC OUT transfers in DMA mode that a HALT interrupt w/ACK bit set should occur, but I only see the XFERCOMP bit, even with it masked out. This is a workaround for that behavior. Should fix this when hardware is fixed.
This is a g_file_storage gadget driver specific workaround: a DELAYED_STATUS result from the fsg_setup routine will result in the gadget queueing a EP0 IN status phase for a two-stage control transfer. Exactly the same as a SET_CONFIGURATION/SET_INTERFACE except that this is a class specific request. Need a generic way to know when the gadget driver will queue the status phase. Can we assume when we call the gadget driver setup() function that it will always queue and require the following flag? Need to look into this.