In blue, the MIPS core, in orange the data cache, in pink the instruction cache, in green the L2 cache. For CHERI, in light green the capability coprocessor and in purple the tag cache.

BERI with 64-bit bus BERI with 128-bit bus BERI with 256-bit bus
CHERI 128-bit with 128-bit bus CHERI 128-bit with 256-bit bus CHERI 256-bit with 256-bit bus