Altera SOPC Builder Version 4.01 Build 214
Copyright (c) 1999-2004 Altera Corporation.  All rights reserved.


# 2004.08.25 11:47:26 (*) mk_custom_sdk starting
# 2004.08.25 11:47:26 (*) Reading project e:/rmf30/cluster/n105_cluster.ptf.

# 2004.08.25 11:47:26 (*) Finding all CPUs
# 2004.08.25 11:47:26 (*) Finding all available components

# 2004.08.25 11:47:26 (*) Found 43 components

# 2004.08.25 11:47:26 (*) Finding all peripherals

# 2004.08.25 11:47:26 (*) Finding software components

# 2004.08.25 11:47:27 (*) Generating gnu SDK for cpu0
# 2004.08.25 11:47:27 (*) Copying Files for cpu0

# 2004.08.25 11:47:27 (*) Generating Memory Map for cpu0
# 
# 2004.08.25 11:47:27 mk_custom_sdk: WARNING
# 
#    stacktop was at zero... bumping it to 127k.
# 

# 2004.08.25 11:47:27 (*) Generating gnu SDK for cpu1
# 2004.08.25 11:47:27 (*) Copying Files for cpu1

# 2004.08.25 11:47:27 (*) Generating Memory Map for cpu1

# 
# 2004.08.25 11:47:27 mk_custom_sdk: WARNING
# 
#    stacktop was at zero... bumping it to 127k.
# 

# 2004.08.25 11:47:27 (*) Building onchip_memory_0_contents.srec using "blank"
# 2004.08.25 11:47:27 (*) cd e:/rmf30/cluster ; nios-convert --outfile=onchip_memory_0_contents.srec --address_low=0 --address_high=2048

# 2004.08.25 11:47:34 (*) Building onchip_memory_1_contents.srec using "blank"
# 2004.08.25 11:47:34 (*) cd e:/rmf30/cluster ; nios-convert --outfile=onchip_memory_1_contents.srec --address_low=2048 --address_high=3072

# 2004.08.25 11:47:37 (*) Building onchip_memory_0_contents.srec using "blank"
# 2004.08.25 11:47:37 (*) cd e:/rmf30/cluster ; nios-convert --outfile=onchip_memory_0_contents.srec --address_low=0 --address_high=2048

# 2004.08.25 11:47:41 (*) Building onchip_memory_2_contents.srec using "blank"
# 2004.08.25 11:47:41 (*) cd e:/rmf30/cluster ; nios-convert --outfile=onchip_memory_2_contents.srec --address_low=2048 --address_high=3072

# 2004.08.25 11:47:44 (*) mk_custom_sdk finishing
# 2004.08.25 11:47:44 (*) Starting generation for system: n105_cluster.

.
.
..
.

# 2004.08.25 11:47:45 (*) Running Generator Program for cpu0

# 2004.08.25 11:48:15 (*) Default Generator Program for: cpu0.

# 2004.08.25 11:48:16 (*) Running Generator Program for cpu1

# 2004.08.25 11:48:44 (*) Default Generator Program for: cpu1.

# 2004.08.25 11:48:45 (*) Running Generator Program for onchip_memory_0

# 2004.08.25 11:48:47 (*) Running Generator Program for onchip_memory_1


WARNING:
WARNING: Parameter validation issue
  Blank ROM:  Legal, but suspicious.
   Parameter 'is_blank' (= 1)

   requires setting paramter 'Writeable'
  Continuing logic generation... at e:/quartus/sopc_builder/bin/europa/europa_utils.pm line 245.

# 2004.08.25 11:48:48 (*) Running Generator Program for onchip_memory_2


WARNING:
WARNING: Parameter validation issue
  Blank ROM:  Legal, but suspicious.
   Parameter 'is_blank' (= 1)

   requires setting paramter 'Writeable'
  Continuing logic generation... at e:/quartus/sopc_builder/bin/europa/europa_utils.pm line 245.


# 2004.08.25 11:48:50 (*) Making arbitration and system (top) modules.

# 2004.08.25 11:48:53 (*) Symbol e:/rmf30/cluster/n105_cluster.bsf already exists, no need to regenerate
# 2004.08.25 11:48:53 (*) Creating command-line system-generation script: e:/rmf30/cluster/n105_cluster_generation_script

BUILDING MODELSIM PROJECT

Reading e:/modeltech_ae/tcl/vsim/pref.tcl 

Reading e:/rmf30/cluster/n105_cluster_sim/modelsim.tcl 

e:/quartus/sopc_builder
e:/quartus//bin/perl561
Sopc_Builder Directory: e:/quartus/sopc_builder 

@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ 
@@ 
@@ setup_sim.do 
@@ 
@@ Defined aliases: 
@@ 
@@ s -- Load all design (HDL) files. 
@@ re-vlog and re-vsim the design. 
@@ 
@@ c -- Re-compile memory contents. 
@@ Builds C- and assembly-language programs 

@@ (and associated simulation data-files 
@@ such as UART simulation strings) for 
@@ refreshing memory contents. 
@@ Does NOT re-generate hardware (HDL) files 
@@ 
@@ w -- Sets-up waveforms for this design 
@@ Each SOPC-Builder component may have 
@@ signals 'marked' for display during 
@@ simulation. This command opens a wave- 

@@ window containing all such signals. 
@@ 
@@ l -- Sets-up list waveforms for this design 
@@ Each SOPC-Builder component may have 
@@ signals 'marked' for listing during 
@@ simulation. This command opens a list- 
@@ window containing all such signals. 
@@ 
@@ h -- print this message 

@@ 
@@ 


# 5.7e


# do create_n105_cluster_project.do 

# Loading project n105_cluster_sim

# 2004.08.25 11:48:57 (*) Setting up Quartus with n105_cluster_setup_quartus_native_synthesis.tcl
e:/quartus/bin/quartus_cmd -f n105_cluster_setup_quartus_native_synthesis.tcl


Info: Processing of Quartus II Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version started at time 08/25/2004 11:49:03

# 2004.08.25 11:49:04 (*) Completed generation for system: n105_cluster.
# 2004.08.25 11:49:04 (*) THE FOLLOWING SYSTEM ITEMS HAVE BEEN GENERATED:
  cpu0 include files such as memory maps : e:/rmf30/cluster/cpu0_/inc/ 
  cpu0 library files : e:/rmf30/cluster/cpu0_/lib/ 
  cpu0 example programs : e:/rmf30/cluster/cpu0_/src/ 
  cpu1 include files such as memory maps : e:/rmf30/cluster/cpu1_/inc/ 
  cpu1 library files : e:/rmf30/cluster/cpu1_/lib/ 
  cpu1 example programs : e:/rmf30/cluster/cpu1_/src/ 
  SOPC Builder database : e:/rmf30/cluster/n105_cluster.ptf 
  System HDL Model : e:/rmf30/cluster/n105_cluster.v 
  System Generation Script : e:/rmf30/cluster/n105_cluster_generation_script 
  ModelSim Simulation Directory : e:/rmf30/cluster/n105_cluster_sim 


# 2004.08.25 11:49:04 (*) SUCCESS: SYSTEM GENERATION COMPLETED.


Press 'Exit' to exit.
