VLSI Design solution notes

These notes are intended to give an indication of the topics that should be covered when answering Tripos questions. They are not model answers.

1998 Paper 7 Question 1

1998 Paper 9 Question 4

1999 Paper 7 Question 1

Observe G = A.B' + B.C + C'.A' so the C'A' term can be shared.

Rewrite F = (A'+B')' + (B+C')' + (C+A)' and G = (A'+B)' + (B'+C')' + (C+A)' for an implementation in NOR gates.

Standard picture with three inputs and their inverses, five min-terms and two final outputs (which will need to be inverted).

p-FETs with their gates tied low as static pull-ups.

AND plane implemented as dynamic NOR pre-charged on clock=0, OR plane implemented as dynamic OR in p-FETs with inverted inputs pre-charged low.

1999 Paper 9 Question 2

2000 Paper 7 Question 1

Stick diagram
Circuit diagram

C element with external reset. Note use of long, turned-on transistors to attenuate weak feed-back.

2000 Paper 9 Question 1