IP blocks are stored in libraries indexed using IP-XACT information.
The SoC design is also described in conformant XML.
A design capture editor supports creation of a high-level block diagram of the SoC.
Various synthesis plugins, termed `generators' produce the actual RTL and other outputs, such as power and frequency estimates or user manuals.
Greaves+Nam created a glue logic synthesiser »Synthesis of glue logic, transactors, multiplexors and serialisors from protocol specifications.
Automatic generation of memory maps is also useful. Header files in RTL and C can be kept in synch. (All modern PC motherboards do automatic generation of memory maps as part of the BIOS plug-and-play service.)
Perhaps explore the free plugin(s) for Eclipse if you are keen.
3: (C) 2008-17, DJ Greaves, University of Cambridge, Computer Laboratory. |