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Xilinx Zynq Super FPGA

Connecting DRAM to FPGAs has become a requirement in the last decade and hardened DRAM controllers are now common. These work well with soft processors synthesised to programmable logic and for accelerated software applications via HLS, but their performance has lagged CPU and GPU so FPGAs are still not ideal for large data bandwidth applications to RAM.

Next came super FPGAs like Zynq from Xilinx. This has two ARM cores, all the standard IP blocks and an FPGA on one die.

The same DRAM bank is accessible to both the hardened ARMs and the programmable logic.

»Xilinx Zynq-7000 Product Brief (PDF)

The high cost of ASIC masks now makes FPGA suitable for medium volume production.

Super FPGAs, like Zynq emerge: the dark silicon trend means we can put all IP blocks on one chip provided we leave them mostly turned off.

Flexible I/O routing means physical pads can be IP block bond outs, GPIOs or FPGA.


25: (C) 2008-17, DJ Greaves, University of Cambridge, Computer Laboratory.