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Semi-Custom Design (repeated slide)

The figure shows a cell from the data book for a standard cell library. Such libraries are the modern equivalent of the 7400 range of logic gates and the silicon chip takes over from the breadboard. The illustrated device has twice the `normal' drive power, which indicates one of the compromises implicit in standard cell over full-custom, which is that the size (driving power) of transistors used in a cell is not tuned on a per-instance basis.

Historically, there were two types of semi-custom devices:

but now the mask-programmed gate array has been replaced with the field-programmed FPGA.

FPGAs have also consumed a great portion of the previous standard cell market since the costs of custom masks cannot be amortised for production runse fewer than 50,000 or so.

In standard cell designs, cells from the library can freely be placed anywhere on the silicon and the number of IO pads and the size of the die can be freely chosen. Clearly this requires that all of the masks used for a chip are unique to that design and cannot be used again. Mask making is one of the largest costs in chip design. »(When) Will FPGAs Kill ASICs?


7: (C) 2008-17, DJ Greaves, University of Cambridge, Computer Laboratory.