Spreadsheet style power modelling from VCD and SAIF logs.
VCD: Verilog Change Dump file - as generated by our net-level SystemC simulations.
SAIF: Switching Activity Interchange Format - the industry standard approach (aka Spatial Archive Interchange Format). »Quick Tutorial and also »TKT Tutorial
Both record the number of changes on each net of circuit from a net-level simulation.
Once we know the capacitance of a net (from layout) we can accurately compute the power consumed.
But, need to design down to the net-level and do a slow low-level simulation to collect adequate data.
Total Energy = Sum over all nets (net activity ratio * net length)
Clearly, if we know the average net length and average activity ratio we get the same precise answer regardless of design details, hence good prospects exist for power estimation from high-level simulations.
| 53: (C) 2008-15, DJ Greaves, University of Cambridge, Computer Laboratory. |