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Gate Arrays and Field-Programmable Logic.


Mask for a Mask-Programmed Gate Array: (Greaves 1995, ECL for Ring Network)

A gate array comes in standard die sizes containing a fixed layout of configurable cells.

Historically, there were two main forms of gate array:

Advantage: Quick design and fabrication, Disadvantage: Large waste of silicon area, low performance.

FPGAs are now used almost exclusively.


11: (C) 2008-15, DJ Greaves, University of Cambridge, Computer Laboratory.