HOME       UP       PREV       FURTHER NOTES       NEXT (A canonical D8/A16 Micro-Computer)  

Simple Microprocessor: Bus Connection and Internals

A microprocessor logic symbol and minimal internal structure.

This device is a bus master or initiator of bus transactions.

It makes a load/read by asserting host read enable: hren = Opreq & R/Wb.

It writes to addess space (a store) by asserting host write enable hwen = Opreq & ~R/Wb.

In this course we are concerned with the external connections only.

2: (C) 2008-12, DJ Greaves, University of Cambridge, Computer Laboratory.