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Inter-core Interrupter (Doorbell/Mailbox)

A commonly-required component for basic synchronisation between separate cores.

Used, for instance, where one CPU has placed a message in a shared memory region for another to read.

It offers multiple target interfaces, one per client bus.

It generates interrupts to one core at the request of another.

Operations: one core writes a register that asserts and interrupt wire to another core.

The interrupted core reads or writes a register in the interrupter to clear the interrupt.

Mailbox variant allows small data items to be written to a queue in the interrupter. These are read out by the (or any) core that is (or wants to) handle the interrupt. Link: »Doorbell Driver Fragments.


36: (C) 2008-12, DJ Greaves, University of Cambridge, Computer Laboratory.