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Digital Logic Power Consumption

.html Power in Watts is voltage times current or engergy times frequency.

The current consumed by a chip is the sum of its static current and dynamic current. Static current is generated by the leakage through off transistors. In the past, for CMOS, static current was of no consequence, but with today's small transistors it can account for one third of a SoC's power consumption.

Dynamic current use is proportional to chip activity. We can get an accurate model of dynamic power by considering :

Some additional dynamic current is consumed as `short-circuit current' which is current consume when both the P and N transistors are on at once, during switching, but we ignore that in these notes. Useful article: » POWER MANAGEMENT IN CPU DESIGN

Activity ratio, a: is the percentage of clock cycles that see a transition. The net toggle rate = Operating frequency of the chip f \times a;

Workstation and laptop microprocessors dissipate tens of Watts: hence cooling fans.

In the past we were often core-bound or pad-bound. Today's SoC designs are commonly power-bound.

41: (C) 2008-11, DJ Greaves, University of Cambridge, Computer Laboratory.