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Network on Chip: Higher Dimensions.

Can we consider higher-dimensional interconnect (non examinable) ?

The hypercube has lowest diameter for number of customers.

Chips are two-dimensional so perhaps it's good to use a 2-D network ?

Maybe use 2.5-D ? have a small number of `multi-hop' links?

On benign (load-balanced) traffic, the flattened butterfly approaches the cost/performance of a butterfly network and has roughly half the cost of a comparable performance clos network.

The advantage over the clos is achieved by eliminating redundant hops when they are not needed for load balance.

See `Flattened butterfly : a cost-efficient topology for high-radix networks' by John Kim, William J. Dally, Dennis Abts.

14: (C) 2008-11, DJ Greaves, University of Cambridge, Computer Laboratory.