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Bridged Bus Structures.

At least one main initiator for each bus.

Bus bridges provide full or partial connectivity and some may write post.

Global address space, non-uniform access time (NUMA).

Some busses might be slower, narrower or in different clock domains.

Max throughput is three (no initiator for low-speed bus).

Actual throughput: traffic pattern dependent.

How and where to connect DRAM is always a key design issue (device 4 contains a cache ?).

Bus bridges and top-levels of structural wiring automatically generated: example tool ARC Architect2.

(C) 2008-10, DJ Greaves, University of Cambridge, Computer Laboratory.