Q. If we do not model clock cycles or instruction counts, how can we work out response times and resource utilisations ?
A. Attach cost annotations and useage diagnostics to whatever behaviours are actually modelled.
Hence, we will use fluid-flow continuous approximation to discrete costs, such as bus cycles, cache misses and DRAM access patterns.
Attach a timing delay annotation to each operation at some level of granularity.
Where to take note of the timing annotations ?
The SystemC EDS kernel maintains the current simulation time.
cout << ``Time now is : `` << simcontext()->time_stamp() << `` \n'';
A coarse schedulling granularity gives high-speed simulation:
But how often must we re-enter the SystemC kernel ?
When using an ISS, how many instructions to model in one step ?
Loosely-timed modelling, also know as temporally-decoupled modelling, can be highly efficient.
Can mix modelling styles in one system, but threads that pass through untimed components will appear faster than real life. This is OK if they are not of interest and not on the critical path, thereby affecting the performance of other components.