NEXT (Structural Hazards in RTL)
Structural Hazard: an interruption to a computation or flow of data owing to a physical resource that has insufficient capacity.
Operations that could potentially be done in parallel
have to be done serially.
clock cycles and holding registers are typically needed.
A Non-fully pipelined component: is unable to start a new operation on every
- insufficient number ALUs for all of the operations to be schedulled in current clock tick.
- insufficient number of ports on a RAM/register file.
- Have a start input and a busy/ready output.
- Component goes busy for a constant or variable number of cycles.
Example: fixed point multipliers and dividers (see additional material).
Example: all floating point operations tend to be implemented with multi-cycle units.