NEXT (Structural Verilog)
RTL Summary View of Variant Forms.
Verilog RTL has a synthesisable subset that can be turned into circuits.
Synthesisable Verilog uses one of the following
forms and these may be mixed within one module:
- 1. Structural - a hierarchial net list form,
- 2a. Combinational, unordered RTL - (but with complex RHS expressions),
- 2b. Synchronous, unordered RTL - (but with complex RHS expressions),
- 3. Behavioural - follows flow of a nominal program counter.
The 2a and 2b forms are the 'pure RTL' forms. The order of
statements is unimportant (the program counter disappears at compile time).