Rule-based hardware generation (BlueSpec)

• Design is expressed as a list of declarative rules,
• Shared variables are mostly replaced with one-place FIFO buffers with handshake,
• Rules are allocated a static schedule at compile time and some that can never fire are reported,
• Tight control of clock cycle (time/space folding) might be relaxed by future compilation strategies.

  rule process_A ;
    case (pc1)
      0 : if (g)
            begin
            $display ("process_A pc=0") ;
            gend <= gend+ 10 ;
            pc1 <= 1 ;
            end 
      1 : if (req1) 
            begin 
            $display ("process_A pc=1 gend=%d", gend) ;
            stage1 <= gend ;
            pc1 <= 2 ;
            strobe1 <= True ; 
            end 
      2 : if (!req1)
            begin
            $display ("process_A pc=2") ;
            pc1 <= 0 ;
            strobe1 <= False ;
            end
    endcase
  endrule

Behavioural expressing using a conceptual thread is also useful to have.

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