Example of a design partition in the SoC era.
A modern implementation would integrate all of the RAM, ROM, ADC and DAC and processors on a single SoC.
The RS-232 remains off chip owing to 24 volt and negative supply voltages whereas the SoC itself may be run at 3.3 volts.
The NV store is a large capacity Flash device with low-bandwidth serial connection. At system boot, the main code for both processors is copied to the two on-chip RAMS by the small, mask-programmed booter.
GPIO is used for all of the digital I/O, with the UART transmit and receive paths being set up as special modes of two of the GPIO connections.