A high-level model of the nominal processor:
The MPhil course work will use the ORP 1K processor and not this nominal processor.
A library of SystemC IP blocks that can be used by various targets in different classes:
TLM (transactional-level modelling) versions of example IP blocks:
The above TLM examples use the TLM 1.0 style since this is easier to understand at first glance.